Manoj Kumar Goparaju

According to our database1, Manoj Kumar Goparaju authored at least 5 papers between 2006 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2010
Scalable identification of threshold logic functions.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2008
A Novel ATPG Framework to Detect Weight Related Defects in Threshold Logic Gates.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2007
A Fault Tolerant Design Methodology for Threshold Logic Gates and Its Optimizations.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2006
A Metric of Tolerance for the Manufacturing Defects of Threshold Logic Gates.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006


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