Manoj Kumar Jain

Orcid: 0000-0003-0876-6273

According to our database1, Manoj Kumar Jain authored at least 13 papers between 2001 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2022
Automated assessment of subjective assignments: A hybrid approach.
Expert Syst. Appl., 2022

2021
Improved Electronically-Tunable Current-Mode Square-Root-Domain First-Order Multifunction Filter.
J. Circuits Syst. Comput., 2021

2019
Novel Lossless Grounded and Floating Inductance Simulators Employing a Grounded Capacitor Based on CC-CFA.
J. Circuits Syst. Comput., 2019

2014
Application Specific Hardware Design Simulation for High Performance Embedded System.
CoRR, 2014

Application Specific Cache Simulation Analysis for Application Specific Instruction set Processor.
CoRR, 2014

An Efficient Synchronous Static Memory design for Embedded System.
CoRR, 2014

2005
Integrated On-Chip Storage Evaluation in ASIP Synthesis.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004
An efficient technique for exploring register file size in ASIP design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

2003
Exploring Storage Organization in ASIP Synthesis.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002
An efficient technique for exploring register file size in ASIP synthesis.
Proceedings of the International Conference on Compilers, 2002

2001
Analysis of the influence of register file size on energyconsumption, code size, and execution time.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

ASIP Design Methodologies : Survey and Issues.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001

Evaluating register file size in ASIP design.
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001


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