Manuel d'Abreu

According to our database1, Manuel d'Abreu authored at least 9 papers between 1998 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2013
Special session 8B: Embedded tutorial challenges in SSD.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Innovative practices session 2C: Memory test.
Proceedings of the 31st IEEE VLSI Test Symposium, 2013

NAND Flash memory: The driving technology in digital storage - Overview and challenges.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2013

2009
From Specification to High-Volume Production.
IEEE Des. Test Comput., 2009

2004
ATPG based functional test for data paths: application to a floating point unit.
Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

2000
Maximizing Wafer Productivity Through Layout Optimization.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Cost Trade-Offs in System On Chip Designs.
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Wire planning for performance and yield enhancement.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1998
Manufacturability analysis of standard cell libraries.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998


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