Marc J. Loinaz

According to our database, Marc J. Loinaz authored at least 6 papers between 1994 and 2011.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2011

A 10Gb/s half-UI IIR-tap transmitter in 40nm CMOS.

Halil Cirit, Marc J. Loinaz

Proceedings of the IEEE International Solid-State Circuits Conference, 2011

2008

A Serial Data Transmitter for Multiple 10Gb/s Communication Standards in 0.13μm CMOS.

Andrew C. Y. Lin, Marc J. Loinaz

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2001

A 10-Gb/s 16: 1 multiplexer and 10-GHz clock synthesizer in 0.25-μm SiGe BiCMOS.

Hong-Ih Cong, Shawn M. Logan, Marc J. Loinaz, Kenneth J. O'Brien, Elizabeth E. Perry, Gary D. Polhemus, John E. Scoggins, Kenneth P. Snowdon, Michael G. Ward

IEEE J. Solid State Circuits, 2001

1998

A 200-mW, 3.3-V, CMOS color camera IC producing 352×288 24-b video at 30 frames/s.

Marc J. Loinaz, Kanwar Jit Singh, Andrew J. Blanksby, David A. Inglis, Kamran Azadet, Bryan D. Ackland

IEEE J. Solid State Circuits, 1998

1995

A CMOS multichannel IC for pulse timing measurements with 1-mV sensitivity.

Marc J. Loinaz, Bruce A. Wooley

IEEE J. Solid State Circuits, December, 1995

1994

A BiCMOS time interval digitizer based on fully-differential, current-steering circuits.

Marc J. Loinaz, Bruce A. Wooley

IEEE J. Solid State Circuits, June, 1994