Marco Elver

Affiliations:
  • University of Edinburgh


According to our database1, Marco Elver authored at least 10 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2023
GWP-ASan: Sampling-Based Detection of Memory-Safety Bugs in Production.
CoRR, 2023

2018
VerC3: A library for explicit state synthesis of concurrent systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Verification of a lazy cache coherence protocol against a weak memory model.
Proceedings of the 2017 Formal Methods in Computer Aided Design, 2017

2016
Memory consistency directed cache coherence protocols for scalable multiprocessors.
PhD thesis, 2016

C<sup>3</sup>D: Mitigating the NUMA bottleneck via coherent DRAM caches.
Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

McVerSi: A test generation framework for fast memory consistency verification in simulation.
Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015
RC3: Consistency Directed Cache Coherence for x86-64 with RC Extensions.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
TSO-CC: Consistency directed cache coherence for TSO.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013
An automated and reproducible workflow for running and analyzing neural simulations using Lancet and IPython Notebook.
Frontiers Neuroinformatics, 2013

Fast RMWs for TSO: semantics and implementation.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2013


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