Marcus Pasquarella

According to our database1, Marcus Pasquarella authored at least 2 papers between 2010 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
A Power and Area Efficient 2.5-16 Gbps Gen4 PCIe PHY in 10nm FinFET CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2018

2010
A 78mW 11.8Gb/s serial link transceiver with adaptive RX equalization and baud-rate CDR in 32nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010


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