Mark Genoe

According to our database1, Mark Genoe authored at least 6 papers between 1991 and 1999.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

1999
How standards will enable hardware/software co-design.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

1996
The Use of Microelectronics for Future Telecom and Multimedia Systems.
Proceedings of the 1996 European Design and Test Conference, 1996

1995
On the use of VHDL-based behavioral synthesis for telecom ASIC design.
Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995

1994
A Parallel Method for Functional Verification of Medium and High Throughput DSP Synthesis.
Proceedings of the Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1994

1993
Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip.
Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1991
Illustration of the SFG-Tracing Multi-Level Behavioral Verification Methodology, by the Correctness Proof of a High to Low Level Synthesis Application in CATHEDRAL-II.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991


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