Martin Straka

According to our database, Martin Straka authored at least 15 papers between 2007 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

Software system design for solution of effective material layout for the needs of production and logistics.

Martin Straka, Martin Hricko

Wirel. Networks, 2022

2013

Metodologie pro návrh číslicových obvodů se zvýšenou spolehlivostí ; Methodology of highly reliable systems design.

Martin Straka

PhD thesis, 2013

Fault tolerant system design and SEU injection based testing.

Martin Straka, Jan Kastil, Zdenek Kotásek, Lukas Miculka

Microprocess. Microsystems, 2013

Methodology for Fault Tolerant System Design Based on FPGA into Limited Redundant Area.

Lukas Miculka, Martin Straka, Zdenek Kotásek

Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Fault tolerant CAN bus control system implemented into FPGA.

Karel Szurman, Jan Kastil, Martin Straka, Zdenek Kotásek

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012

Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA.

Jan Kastil, Martin Straka, Lukas Miculka, Zdenek Kotásek

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Test platform for fault tolerant systems design properties verification.

Martin Straka, Lukas Miculka, Jan Kastil, Zdenek Kotásek

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

SEU Simulation Framework for Xilinx FPGA: First Step towards Testing Fault Tolerant Systems.

Martin Straka, Jan Kastil, Zdenek Kotásek

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

Advanced fault tolerant bus for multicore system implemented in FPGA.

Martin Straka, Jan Kastil, Jaroslav Novotný, Zdenek Kotásek

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010

Fault Tolerant Structure for SRAM-Based FPGA via Partial Dynamic Reconfiguration.

Martin Straka, Jan Kastil, Zdenek Kotásek

Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

Modern fault tolerant architectures based on partial dynamic reconfiguration in FPGAs.

Martin Straka, Jan Kastil, Zdenek Kotásek

Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009

High Availability Fault Tolerant Architectures Implemented into FPGAs.

Martin Straka, Zdenek Kotásek

Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008

Digital Systems Architectures Based on On-line Checkers.

Martin Straka, Zdenek Kotásek, Jan Winter

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Online Protocol Testing for FPGA Based Fault Tolerant Systems.

Jiri Tobola, Zdenek Kotásek, Jan Korenek, Tomás Martínek, Martin Straka

Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Checker Design for On-line Testing of Xilinx FPGA Communication Protocols.

Martin Straka, Jiri Tobola, Zdenek Kotásek

Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007