Masahiko Iwane

According to our database1, Masahiko Iwane authored at least 12 papers between 1992 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2010
An Efficient Hardware Architecture from C Program with Memory Access to Hardware.
Proceedings of the Computational Science and Its Applications, 2010

2009
An intermediate hardware model with load/store unit for C to FPGA.
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009

An Efficient Comparative Evaluation to Buffering Methods for Window-based Image Processing Using Semi-programmable Hardware.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2008
An FPGA implementation of a DWT with 5/3 filter using semi-programmable hardware.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
An FPGA implementation of a snoop cache with synchronization for a multiprocessor system-on-chip.
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007

A Programmable Load/Store Unit on C-based Hardware Design for FPGA.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2005
Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor.
Proceedings of the 8th International Symposium on Parallel Architectures, 2005

An efficient parallel processing using a cache memory with synchronization on a Soc-multiprocessor.
Proceedings of the Third IASTED International Conference on Circuits, 2005

2004
Evaluation of mechanisms introduced to improve performance of TSVM cache.
Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Networks, 2004

2002
Organization of Shared Memory with Synchronization for Multiprocessor-on-a-chip.
Proceedings of the 9th International Conference on Parallel and Distributed Systems, 2002

2001
Tagged communication and synchronization memory for multiprocessor-on-a-chip.
Systems and Computers in Japan, 2001

1992
Extracting distance from defocused images with different aperture sizes.
Systems and Computers in Japan, 1992


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