Masato Kitakami

According to our database1, Masato Kitakami authored at least 37 papers between 1993 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Low Power Neural Network by Reducing SRAM Operating Voltage.
IEEE Access, 2022

2020
Tail-Biting Berlekamp-Preparata Convolutional Codes for Phased-Burst-Error-Correcting.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020

2019
A Method for Stable Block Generation Time in Proof of Work.
Proceedings of the 24th IEEE Pacific Rim International Symposium on Dependable Computing, 2019

2018
Research on Convolutional Codes are Used in RAID.
Proceedings of the 23rd IEEE Pacific Rim International Symposium on Dependable Computing, 2018

An Attack-Tolerant Agreement Algorithm for Block Chain.
Proceedings of the 23rd IEEE Pacific Rim International Symposium on Dependable Computing, 2018

2017
An Error Correction Method for Neighborhood-Level Errors in NAND Flash Memories.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

2016
The effective method of improving Berlekamp-Preparata convolutional codes decoding by tail-biting technology.
Proceedings of the 2016 International Symposium on Information Theory and Its Applications, 2016

2014
Codes Correcting Asymmetric/Unidirectional Errors along with Bidirectional Errors of Small Magnitude.
Proceedings of the 20th IEEE Pacific Rim International Symposium on Dependable Computing, 2014

2013
Neighborhood Level Error Control Codes for Multi-Level Cell Flash Memories.
IEICE Trans. Inf. Syst., 2013

A Class of q-Ary Unidirectional Error Correcting Codes for MLC Flash Memories.
Proceedings of the IEEE 19th Pacific Rim International Symposium on Dependable Computing, 2013

Testing of switch blocks in TSV-reduced Three-Dimensional FPGA.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013

2012
Proposal of Grid Monitoring System with Fault Tolerance.
J. Inf. Process., 2012

2011
Trust Management of Grid System Embedded with Resource Management System.
IEICE Trans. Inf. Syst., 2011

Error Recovery Method for PPM Compressed Data.
Proceedings of the 2011 Data Compression Conference (DCC 2011), 2011

Comparing Static Load Balancing Algorithms in Grid.
Proceedings of the Cooperative Design, Visualization, and Engineering, 2011

2010
Quantitative Evaluation of Integrity for Remote System Using the Internet.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Prolongation of Lifetime and the Evaluation Method of Dependable SSD.
Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

2009
Burst Error Recovery Method for LZSS Coding.
IEICE Trans. Inf. Syst., 2009

Dependability Evaluation for Internet-Based Remote Systems.
Proceedings of the 2009 15th IEEE Pacific Rim International Symposium on Dependable Computing, 2009

Lossless Image Compression by PPM-Based Prediction Coding.
Proceedings of the 2009 Data Compression Conference (DCC 2009), 2009

2008
Dependability Improvement for PPM Compressed Data by Using Compression Pattern Matching.
IEICE Trans. Inf. Syst., 2008

A Checkpointing Method with Small Checkpoint Latency.
IEICE Trans. Inf. Syst., 2008

2007
Error Recovery Method for Multiple-Dictionary Compression Method.
Proceedings of the 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2007), 2007

2005
Burst Error Recovery for Huffman Coding.
IEICE Trans. Inf. Syst., 2005

Code Design and Decoding Methods for Burst Error Locating Codes.
Proceedings of the 11th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2005), 2005

Fault-Tolerant Wormhole Switching with Backtracking Capability.
Proceedings of the 20th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2005), 2005

2004
Fault-Tolerant Message Switching Based on Wormhole Switching and Backtracking.
Proceedings of the 10th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2004), 2004

2002
Fault-Tolerant Properties of Generalized Hierarchical Completely-Connected Networks.
Proceedings of the 9th Pacific Rim International Symposium on Dependable Computing (PRDC 2002), 2002

A Fault-tolerant Routing Strategy for Generalized Hierarchical Completely-connected Networks.
Proceedings of the International Conference on Parallel and Distributed Computing Systems, 2002

2001
Escape and Restoration Routing: Suspensive Deadlock Recovery in Interconnection Networks.
Proceedings of the 8th Pacific Rim International Symposium on Dependable Computing (PRDC 2001), 2001

Fault-Tolerance of Functional Programs Based on the Parallel Graph Reduction.
Proceedings of the 8th Pacific Rim International Symposium on Dependable Computing (PRDC 2001), 2001

2000
Evaluations of Burst Error Recovery for VF Arithmetic Coding.
Proceedings of the 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 2000

1998
Optimal Two-Level Unequal Error Control Codes for Computer Systems.
IEEE Trans. Computers, 1998

1996
Reliable Logic Circuits with Byte Error Control Codes: A Feasibility Study.
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996

1995
A Class of Optimal Fixed-Byte Error Protection Codes for Computer Systems.
Proceedings of the Digest of Papers: FTCS-25, 1995

1994
A class of error-correcting codes for byte-organized memory systems.
IEEE Trans. Inf. Theory, 1994

1993
A Class of Error Locating Codes for Byte-Organized Memory Systems.
Proceedings of the Digest of Papers: FTCS-23, 1993


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