Maura Turolla

According to our database1, Maura Turolla authored at least 15 papers between 1998 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2011
Campus++: A publish-subscribe architecture for intermittently connected 802.15.4 networks.
Proceedings of the 8th Annual IEEE Communications Society Conference on Sensor, 2011

Design, implementation and performance evaluation of a publish-subscribe architecture for intermittently connected 802.15.4 networks.
Proceedings of the 8th ACM Symposium on Performance evaluation of wireless ad hoc, 2011

Delay performance of a Publish Subscribe system deployed over a memory-constrained, Delay Tolerant Network.
Proceedings of the 10th IFIP Annual Mediterranean Ad Hoc Networking Workshop, 2011

A topic-based, publish-subscribe architecture for intermittently connected 802.15.4 networks.
Proceedings of the 2011 Future Network & Mobile Summit, Warsaw, Poland, June 15-17, 2011, 2011

2010
On the IP support in IEEE 802.15.4 LR-WPANs: Self-configuring solutions for real application scenarios.
Proceedings of the 9th IFIP Annual Mediterranean Ad Hoc Networking Workshop, 2010

2007
Modeling and simulation alternatives for the design of networked embedded systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Finding the Mobile Trusted Element.
Proceedings of the ISSE 2006, 2006

Modeling and simulation of mobile gateways interacting with wireless sensor networks.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

2005
Embedded SW Design Issues for Distributed Applications on Mobile Terminals.
Proceedings of the 2nd Annual International Conference on Mobile and Ubiquitous Systems (MobiQuitous 2005), 2005

2004
Heterogeneous Co-Simulation of Networked Embedded Systems.
Proceedings of the 2004 Design, 2004

2000
Merging hardware and software: intellectual property cores for Internet applications.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999
FPGA Design Experiences Using the CSELT VIP (TM) Library.
Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

A fully synthesizable parameterized Viterbi decoder.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

Intellectual property re-use and system emulation the keys to succeed the SoC challenge: a digital TV application.
Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1998
The virtual chip set: a parametric IP library for system-on-a-chip design.
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, 1998


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