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Mayur Agarwal

Orcid: 0000-0003-0729-4606

According to our database1, Mayur Agarwal authored at least 4 papers between 2016 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2021
Design and implementation of 20-T hybrid full adder for high-performance arithmetic applications.
[BibTeX]
[DOI]
Jyoti Kandpal
,
Abhishek Tomar
,
Mayur Agarwal
Microelectron. J., 2021

2020
High-Speed Hybrid-Logic Full Adder Using High-Performance 10-T XOR-XNOR Cell.
[BibTeX]
[DOI]
Jyoti Kandpal
,
Abhishek Tomar
,
Mayur Agarwal
,
Kamal Kumar Sharma
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System.
[BibTeX]
[DOI]
Mayur Agarwal
,
Arijit De
,
Swapna Banerjee
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2016
Architecture of a real-time delay calculator for digital beamforming in ultrasound system.
[BibTeX]
[DOI]
Mayur Agarwal
,
Arijit De
,
Swapna Banerjee
IET Circuits Devices Syst., 2016


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