Swapna Banerjee

According to our database, Swapna Banerjee authored at least 81 papers between 1971 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

FPGA-accelerated adaptive projection-based image registration.

Pulak Mondal, Swapna Banerjee

J. Real Time Image Process., 2021

2020

Smartphone-Based Point-of-Care System Using Continuous-Wave Portable Doppler.

Biswabandhu Jana, Rakesh Biswas, Pallab Kumar Nath, Goutam Saha, Swapna Banerjee

IEEE Trans. Instrum. Meas., 2020

A Low-Error, Memory-Based Fast Binary Logarithmic Converter.

Biswabandhu Jana, Avishek Sinha Roy, Goutam Saha, Swapna Banerjee

IEEE Trans. Circuits Syst. II Express Briefs, 2020

A high throughput pass parallel block decoder architecture for JPEG 2000 that prevents stalling in the decoding process.

Pallab Kumar Nath, Swapna Banerjee

Integr., 2020

Compiler compatible 5.66 Mb/mm² 8T 1R1W register file in 14 nm FinFET technology.

Arindrajit Ghosh, Uddalak Bhattacharya, Manish Kumar, Swapna Banerjee

Integr., 2020

2019

A Reconfigurable Memory-Based Fast VLSI Architecture for Computation of the Histogram.

Pulak Mondal, Swapna Banerjee

IEEE Trans. Consumer Electron., 2019

An IEEE Single Precision Floating Point Arithmetic-Based Apodization Architecture for Portable Ultrasound Imaging System.

Mayur Agarwal, Arijit De, Swapna Banerjee

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Detection of peripheral arterial disease using Doppler spectrogram based expert system for Point-of-Care applications.

Biswabandhu Jana, Kamal Oswal, Sankar Mitra, Goutam Saha, Swapna Banerjee

Biomed. Signal Process. Control., 2019

2018

Accuracy Enhancement for Noninvasive Glucose Estimation Using Dual-Wavelength Photoacoustic Measurements and Kernel-Based Calibration.

Praful P. Pai, Arijit De, Swapna Banerjee

IEEE Trans. Instrum. Meas., 2018

A High-Precision Low-Area Unified Architecture for Lossy and Lossless 3D Multi-Level Discrete Wavelet Transform.

Rakesh Biswas, Siddarth Reddy Malreddy, Swapna Banerjee

IEEE Trans. Circuits Syst. Video Technol., 2018

Cloud Computing-Based Non-Invasive Glucose Monitoring for Diabetic Care.

Praful P. Pai, Pradyut Kumar Sanki, Sudeep K. Sahoo, Arijit De, Sourangshu Bhattacharya, Swapna Banerjee

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Computationally Efficient Reconfigurable Constant Multiplication Architecture Based on CSD Decoded Vertical-Horizontal Common Sub-Expression Elimination Algorithm.

Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

Contention free delayed keeper for high density large signal sensing memory compiler.

Arindrajit Ghosh, Uddalak Bhattacharya, Swapna Banerjee

Integr., 2018

2016

A high speed, memory efficient line based VLSI architecture for the dual mode inverse discrete wavelet transform of JPEG2000 decoder.

Pallab Kumar Nath, Swapna Banerjee

Microprocess. Microsystems, 2016

Architecture of a real-time delay calculator for digital beamforming in ultrasound system.

Mayur Agarwal, Arijit De, Swapna Banerjee

IET Circuits Devices Syst., 2016

A Low Complexity VLSI Architecture for Multi-Focus Image Fusion in DCT Domain.

Ashutosh Mishra, Sudipta Mahapatra, Swapna Banerjee

CoRR, 2016

FPGA based accelerated 3D affine transform for real-time image processing applications.

Pulak Mondal, Pradyut Kumar Biswal, Swapna Banerjee

Comput. Electr. Eng., 2016

A new paradigm of oral cancer detection using digital infrared thermal imaging.

Mrityunjoy Chakraborty, Sudipta Mukhopadhyay, A. Dasgupta, Swapna Banerjee, Santanu Patsa, Jay G. Ray, K. Chaudhuri

Proceedings of the Medical Imaging 2016: Computer-Aided Diagnosis, San Diego, California, United States, 27 February, 2016

Implementation of Smartphone Based Blood Flow Diagnoses from Doppler Spectrogram.

Biswabandhu Jana, Swapna Banerjee

Proceedings of the 29th IEEE International Symposium on Computer-Based Medical Systems, 2016

2015

Efficient Hardware Implementation of Encoder and Decoder for Golay Code.

Satyabrata Sarangi, Swapna Banerjee

IEEE Trans. Very Large Scale Integr. Syst., 2015

VLSI-Assisted Nonrigid Registration Using Modified Demons Algorithm.

Ashutosh Mishra, Pulak Mondal, Swapna Banerjee

IEEE Trans. Very Large Scale Integr. Syst., 2015

An Efficient VLSI Architecture of a Reconfigurable Pulse-Shaping FIR Interpolation.

Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee

IEEE Trans. Very Large Scale Integr. Syst., 2015

An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis.

Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee

IEEE Trans. Circuits Syst. I Regul. Pap., 2015

An FPGA-based architecture of DSC-SRI units specially for motion blind ultrasound systems.

Rakesh Biswas, Kishor Sarawadekar, Srinivas Varna, Swapna Banerjee

J. Real Time Image Process., 2015

A photoacoustics based continuous non-invasive blood glucose monitoring system.

Praful P. Pai, Pradyut Kumar Sanki, Swapna Banerjee

Proceedings of the 2015 IEEE International Symposium on Medical Measurements and Applications, 2015

A 10-Bit 500 MSPS Segmented DAC with Optimized Current Sources to Avoid Mismatch Effect.

Santanu Sarkar, Swapna Banerjee

Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

NIR photoacoustic spectroscopy for non-invasive glucose measurement.

Praful P. Pai, Pradyut Kumar Sanki, Arijit De, Swapna Banerjee

Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

2014

An 8-bit low power DAC with re-used distributed binary cells architecture for reconfigurable transmitters.

Santanu Sarkar, Swapna Banerjee

Microelectron. J., 2014

Comparative Analysis of Golay Code Based Excitation and Coherent Averaging for Non-invasive Glucose Monitoring System.

Satyabrata Sarangi, Praful P. Pai, Pradyut Kumar Sanki, Swapna Banerjee

Proceedings of the 2014 IEEE 27th International Symposium on Computer-Based Medical Systems, 2014

2D/3D Non-rigid Image Registration by an Efficient Demons Approach.

Ashutosh Mishra, Pulak Mondal, Swapna Banerjee

Proceedings of the 2014 IEEE 27th International Symposium on Computer-Based Medical Systems, 2014

2013

Foreground calibration technique of a pipeline ADC using capacitor ratio of Multiplying Digital-to-Analog Converter (MDAC).

Sounak Roy, Hiranmoy Basak, Swapna Banerjee

Microelectron. J., 2013

Parallel architecture for accelerating affine transform in high-speed imaging systems.

Pradyut Kumar Biswal, Pulak Mondal, Swapna Banerjee

J. Real Time Image Process., 2013

Reconfigurable Architecture of a RRC Fir Interpolator for Multi-standard Digital Up Converter.

Indranil Hatai, Indrajit Chakrabarti, Swapna Banerjee

Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2012

VLSI-DSP based real time solution of DSC-SRI for an ultrasound system.

Kishor Sarawadekar, Harihar Bharat Indana, Deep Bera, Swapna Banerjee

Microprocess. Microsystems, 2012

VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000.

Kishor Sarawadekar, Swapna Banerjee

Integr., 2012

Radix based digital calibration technique for pipelined ADC using Nyquist sampling of sinusoid.

Sounak Roy, Bibhudatta Sahoo, Swapna Banerjee

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

Modified Demons deformation algorithm for non-rigid image registration.

Ashutosh Mishra, Pulak Mondal, Swapna Banerjee

Proceedings of the 4th International Conference on Intelligent Human Computer Interaction, 2012

Motion estimation in medical video sequences using affine transform.

Pulak Mondal, Swapna Banerjee

Proceedings of CBMS 2012, 2012

2011

An Efficient Pass-Parallel Architecture for Embedded Block Coder in JPEG 2000.

Kishor Sarawadekar, Swapna Banerjee

IEEE Trans. Circuits Syst. Video Technol., 2011

2010

An Efficient Architecture for 3-D Discrete Wavelet Transform.

Anirban Das, Anindya Hazra, Swapna Banerjee

IEEE Trans. Circuits Syst. Video Technol., 2010

Architectural design and FPGA implementation of radix-4 CORDIC processor.

Kaushik Bhattacharyya, Rakesh Biswas, Anindya Sundar Dhar, Swapna Banerjee

Microprocess. Microsystems, 2010

A tunable transconductor with high linearity.

Vijaya Bhadauria, Krishna Kant, Swapna Banerjee

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009

An 8-bit 1.8 V 500 MSPS CMOS Segmented Current Steering DAC.

Santanu Sarkar, Swapna Banerjee

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

Efficient VLSI architecture for bit plane encoder of JPEG 2000.

Kishor Sarawadekar, Swapna Banerjee

Proceedings of the International Conference on Image Processing, 2009

A high speed bit plane coder for JPEG 2000 and it's FPGA implementation.

Kishor Sarawadekar, Swapna Banerjee

Proceedings of the 17th European Signal Processing Conference, 2009

Multirate scan conversion of ultrasound images using warped distance based adaptive bilinear interpolation.

Deep Bera, Leeladhar Agarwal, Swapna Banerjee

Proceedings of the Twenty-Second IEEE International Symposium on Computer-Based Medical Systems, 2009

2008

A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier.

Sounak Roy, Swapna Banerjee

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture.

Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006

Design of Low-Voltage Low-Power Continuous-Time Filter for Hearing Aid Application Using CMOS Current Conveyor Based Translinear Loop.

Debashis Dutta, Ritesh Ujjwal, Swapna Banerjee

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

An 8-Bit, 3.8GHz Dynamic BiCMOS Comparator for High-Performance ADC.

Sanjoy Kumar Dey, Swapna Banerjee

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Real Time Dynamic Receive Apodization for an Ultrasound Imaging System.

J. Bhattacharyya, P. Mandal, R. Banerjee, Swapna Banerjee

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

A Real Time Speckle Noise Cleaning Filter for Ultrasound Images.

Bodhisatwa Mazumdar, Aman Mediratta, Joydeep Bhattacharyya, Swapna Banerjee

Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006

Quantitative Analysis of Histopathological Features of Precancerous Lesion and Condition Using Image Processing Technique.

Abhijeet Jadhav, Swapna Banerjee, P. K. Dutta, Ranjan Rashmi Paul, Mousumi Pal, P. Banerjee, K. Chaudhuri, Jyotirmoy Chatterjee

Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006

A Fully Differential 11mW 10-bit 200MS/s Sample and Hold in 0.25µm BiCMOS Technology.

Santanu Sarkar, Arindrajit Ghosh, Swapna Banerjee

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture.

Koushik Maharatna, Swapna Banerjee, Eckhard Grass, Milos Krstic, Alfonso Troya

IEEE Trans. Circuits Syst. Video Technol., 2005

A 160MSPS 8-Bit Pipeline Based ADC.

Samiran Halder, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Swapna Banerjee

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A 10-Bit 80-MSPS 2.5-V 27.65-mW 0.185-mm² Segmented Current Steering CMOS DAC.

Samiran Halder, Swapna Banerjee, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Sanjoy Kumar Dey

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design.

Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee, Sriram Gupta

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Design of static and dynamic translinear circuits based on CMOS CCII translinear loops.

Debashis Dutta, Ritesh Ujjwal, Swapna Banerjee, Wouter A. Serdijn

Proceedings of the 12th IEEE International Conference on Electronics, 2005

2004

A 16-bit CORDIC rotator for high-speed wireless LAN.

Koushik Maharatna, Alfonso Troya, Swapna Banerjee, Eckhard Grass, Milos Krstic

Proceedings of the IEEE 15th International Symposium on Personal, 2004

A regular algorithm for real time Radon & inverse Radon transform [image processing applications].

Abhishek Mitra, Swapna Banerjee

Proceedings of the 2004 IEEE International Conference on Acoustics, 2004

A New Interpolation Free Method for X-ray CT Image Reconstruction.

Abhishek Mitra, Swapna Banerjee

Proceedings of the 17th IEEE Symposium on Computer-Based Medical Systems (CBMS 2004), 2004

Real Time Noise Cleaning of Ultrasound Images.

Anindya Hazra, J. Bhattacharyya, Swapna Banerjee

Proceedings of the 17th IEEE Symposium on Computer-Based Medical Systems (CBMS 2004), 2004

Homogeneity Induced Inertial Snake with Application to Medical Image Segmentation.

Bipul Das, Swapna Banerjee

Proceedings of the 17th IEEE Symposium on Computer-Based Medical Systems (CBMS 2004), 2004

2003

A New Approach to Analyze a Sub-micron CMOS Inverter.

Manisha Pattanaik, Swapna Banerjee

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

A Memory Efficient 3-D DWT Architecture.

Bipul Das, Swapna Banerjee

Proceedings of the 16th International Conference on VLSI Design (VLSI Design 2003), 2003

A low complexity architecture for complex discrete wavelet transform.

Bipul Das, Swapna Banerjee

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

A Novel Ram Architecture For Bit-Plane Based Coding.

Bipul Das, Swapna Banerjee

Proceedings of the 2003 Data Compression Conference (DCC 2003), 2003

2002

Design of continuous-time filter for hearing aid application using current conveyors.

Debashis Dutta, Qadeer Ahmad Khan, Swapna Banerjee

Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

VLSI architecture for a new real-time 3D wavelet transform.

B. Das, Swapna Banerjee

Proceedings of the IEEE International Conference on Acoustics, 2002

A Wavelet Based Low Complexity Embedded Block Coding Algorithm.

Bipul Das, Swapna Banerjee

Proceedings of the 2002 Data Compression Conference (DCC 2002), 2002

2001

A VLSI array architecture for realization of DFT, DHT, DCT and DST.

Koushik Maharatna, A. S. Dhar, Swapna Banerjee

Signal Process., 2001

A VLSI array architecture for Hough transform.

Koushik Maharatna, Swapna Banerjee

Pattern Recognit., 2001

FPGA realization of a CORDIC based FFT processor for biomedical signal processing.

Ayan Banerjee, Anindya Sundar Dhar, Swapna Banerjee

Microprocess. Microsystems, 2001

A CORDIC based array architecture for complex discrete wavelet transform.

Bipul Das, Swapna Banerjee

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

2000

Knowledge Base System for Diagnostic Assessment of Doppler Spectogram.

Bipul Das, S. K. Mitra, Swapna Banerjee

Proceedings of the MICAI 2000: Advances in Artificial Intelligence, 2000

1998

Knowledge-based Doppler blood-velocimeter system.

Bipul Das, Swapna Banerjee

Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1998

1995

Finite element analysis of SiGe heterojunction devices.

G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Analysis of temperature dependence of Si-Ge HBT.

G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee

Proceedings of the 8th International Conference on VLSI Design (VLSI Design 1995), 1995

1994

Finite Element Analysis of SIGe npn HBT.

G. Hari Rama Krishna, Nirmal B. Chakrabarti, Swapna Banerjee

Proceedings of the Seventh International Conference on VLSI Design, 1994

1971

On the Probability Distribution of Round-off Errors Propagated in Tabular Differences.

S. K. Mitra, Swapna Banerjee

Aust. Comput. J., 1971