Mekala Bindu Bhargavi

Orcid: 0009-0007-4637-2212

According to our database1, Mekala Bindu Bhargavi authored at least 6 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Scalable Network-on-Chip Design for FPGA Implementation.
IEEE Access, 2026

2025
Enhancing fault-tolerant application mapping in network-on-chip through transformer network based reinforcement learning approach.
Discov. Comput., December, 2025

Cycle-Accurate ML-Based Power Modeling for RISC-V Cores Using RTL Simulations.
Proceedings of the 38th IEEE International System-on-Chip Conference, 2025

2024
Automated Design and Configuration of RISC-V based NoC-MPSoC Framework on FPGA.
Proceedings of the 28th International Symposium on VLSI Design and Test, 2024

Optimizing Convolutional Image Processing on RISC-V Using Branch Prediction on FPGA.
Proceedings of the IEEE Region 10 Conference, 2024

Optimizing LU Decomposition with RISC-V Based Hardware Acceleration.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024


  Loading...