Meysam Akbari

IEEE Trans. Very Large Scale Integr. Syst., October, 2024

A 69MHz-Bandwidth 40V/μ s-Slew-Rate 3n V/√Hz-Noise 4.5 μ V-Offset Chopper Operational Amplifier.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., July, 2024

Implementation of a Double-Path Flipped Voltage Follower Cell for Voltage Conveyors.

[BibT_eX]

[DOI]

IEEE Access, 2024

A 0.9 V Adaptive Sampling Rate Differential Level Crossing-SAR ADC for Biomedical Signal Acquisition System.

[BibT_eX]

[DOI]

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

2023

A Rail-to-Rail Transconductance Amplifier Based on Current Generator Circuits.

[BibT_eX]

[DOI]

Fabian Khateb

IEEE Trans. Very Large Scale Integr. Syst., October, 2023

A 4.5 $\mu$W Miniaturized 3-Channel Wireless Intra-Cardiac Acquisition System.

[BibT_eX]

[DOI]

IEEE Trans. Biomed. Circuits Syst., October, 2023

Implementation of a Multipath Fully Differential OTA in 0.18-μm CMOS Process.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2023

A 69MHz-Bandwidth 40V/μs-Slew-rate 3nV/√Hz-Noises 4.5μV-Offset Chopper Operational Amplifier.

[BibT_eX]

[DOI]

Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022

A 0.5-V Multiple-Input Bulk-Driven OTA in 0.18-μm CMOS.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2022

0.4-V Tail-Less Quasi-Two-Stage OTA Using a Novel Self-Biasing Transconductance Cell.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

0.5 V, nW-Range Universal Filter Based on Multiple-Input Transconductor for Biosignals Processing.

[BibT_eX]

[DOI]

Sensors, 2022

Low-Voltage Implementation of Neuromorphic Circuits for a Spike-Based Learning Control Module.

[BibT_eX]

[DOI]

IEEE Access, 2022

2021

An Enhanced Input Differential Pair for Low-Voltage Bulk-Driven Amplifiers.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2021

An Adjustable Dual-Output Current Mode MOSFET-Only Filter.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2021

A 0.3-V Conductance-Based Silicon Neuron in 0.18 μm CMOS Process.

[BibT_eX]

[DOI]

Ting-I Chou

IEEE Trans. Circuits Syst. II Express Briefs, 2021

0.5-V High Linear and Wide Tunable OTA for Biomedical Applications.

[BibT_eX]

[DOI]

IEEE Access, 2021

2019

A low-voltage gain boosting-based current mirror with high input/output dynamic range.

[BibT_eX]

[DOI]

Mohamadsaeed Doreyatim

Masoud Nazari

Sina Mahani

Microelectron. J., 2019

A charge sharing-based switching scheme for SAR ADCs.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2019

0.3-V Bulk-Driven Nanopower OTA-C Integrator in 0.18 µm CMOS.

[BibT_eX]

[DOI]

Circuits Syst. Signal Process., 2019

Energy-Efficient and Area-Efficient Switching Schemes for SAR ADCs.

[BibT_eX]

[DOI]

Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

2018

Input Offset Estimation of CMOS Integrated Circuits in Weak Inversion.

[BibT_eX]

[DOI]

Farshad Moradi

IEEE Trans. Very Large Scale Integr. Syst., 2018

An energy-efficient DAC switching algorithm based on charge recycling method for SAR ADCs.

[BibT_eX]

[DOI]

Microelectron. J., 2018

A Class-AB Bulk-Driven Amplifier with Enhanced Transconductance Using Quasi-Floating Gate Method.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2018

A High Slew Rate CMOS OTA with Dynamic Current Boosting Paths.

[BibT_eX]

[DOI]

Farshad Moradi

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017

A 63-dB gain OTA operating in subthreshold with 20-nW power consumption.

[BibT_eX]

[DOI]

Int. J. Circuit Theory Appl., 2017

Design and Analysis of an Ultra-Low-Power Second-Order Asynchronous Delta-Sigma Modulator.

[BibT_eX]

[DOI]

Farshad Moradi

Circuits Syst. Signal Process., 2017

2016

Multi-Path Class AB Operational Amplifier with High Performance for SC Circuits.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2016

2015

Design of a 10-Bit High Performance Current-Steering DAC with a Novel Nested Decoder Based on Domino Logic.

[BibT_eX]

[DOI]

J. Circuits Syst. Comput., 2015

High Gain and High CMRR Two-Stage Folded Cascode OTA with Nested Miller Compensation.

[BibT_eX]

[DOI]