Farshad Moradi

According to our database1, Farshad Moradi authored at least 111 papers between 1999 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2021
Optimum PZT Patch Size for Corrosion Detection in Reinforced Concrete Using the Electromechanical Impedance Technique.
Sensors, 2021

Pain detection using batch normalized discriminant restricted Boltzmann machine layers.
J. Vis. Commun. Image Represent., 2021

Flexible Energy-Efficient Implementation of Adaptive Spiking Encoder for Neuromorphic Processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 53GΩ@DC Input Impedance Multi-Channel Neural Recording Amplifier with 0.77 μVrms Input-Referred Noise for Deep Brain Implants.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
Ultrasonically Powered Compact Implantable Dust for Optogenetics.
IEEE Trans. Biomed. Circuits Syst., 2020

Biointegrated and Wirelessly Powered Implantable Brain Devices: A Review.
IEEE Trans. Biomed. Circuits Syst., 2020

Quantification of brain oxygen extraction and metabolism with [<sup>15</sup>O]-gas PET: A technical review in the era of PET/MRI.
NeuroImage, 2020

Tunable Voltage-Mode Subthreshold CMOS Neuron.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Energy-Efficient Start-up Dickson Charge Pump for Batteryless Biomedical Implant Devices.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

A High-Resolution Ultrasonically Powered And Controlled Optogenetic Stimulator With A Novel Fully Analog Time To Current Converter.
Proceedings of the 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2020

2019
A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs.
IEEE Trans. Emerg. Top. Comput., 2019

LAS-NCS: A Laser-Assisted Spintronic Neuromorphic Computing System.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Low-Power High-Input-Impedance EEG Signal Acquisition SoC With Fully Integrated IA and Signal-Specific ADC for Wearable Applications.
IEEE Trans. Biomed. Circuits Syst., 2019

An Implantable Ultrasonically Powered System for Optogenetic Stimulation with Power-Efficient Active Rectifier and Charge-Reuse Capability.
IEEE Trans. Biomed. Circuits Syst., 2019

A low-power, low-noise, high-accurate epileptic-seizure detection system for wearable applications.
Microelectron. J., 2019

Highly stable, low power FinFET SRAM cells with exploiting dynamic back-gate biasing.
Integr., 2019

A charge sharing-based switching scheme for SAR ADCs.
Int. J. Circuit Theory Appl., 2019

Spin-Orbit-Torque-based Devices, Circuits and Architectures.
CoRR, 2019

An Ultrasonically Powered Optogenetic Microstimulators with Power-Efficient Active Rectifier and Charge Reuse Capability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

STARDUST: Optogenetics, Electrophysiology and Pharmacology with an Ultrasonically Powered DUST for Parkinson's Disease.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

A Low-Noise High Input Impedance Analog Front-End Design for Neural Recording Implant.
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019

Overvoltage Protection Circuits for Ultrasonically Powered Implantable Microsystems.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

Multi-Ring Ultrasonic Transducer on a Single Piezoelectric Disk For Powering Biomedical Implants.
Proceedings of the 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2019

Spin-Torque-Nano-Oscillator based neuromorphic computing assisted by laser.
Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

2018
Offset-Compensated High-Speed Sense Amplifier for STT-MRAMs.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Input Offset Estimation of CMOS Integrated Circuits in Weak Inversion.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Progressive Scaled STT-RAM for Approximate Computing in Multimedia Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

A Reduced Store/Restore Energy MRAM-Based SRAM Cell for a Non-Volatile Dynamically Reconfigurable FPGA.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

An energy-efficient DAC switching algorithm based on charge recycling method for SAR ADCs.
Microelectron. J., 2018

A Domino Circuit Technique for Noise-Immune High Fan-In Gates.
J. Circuits Syst. Comput., 2018

A Low-Power High-Speed Spintronics-Based Neuromorphic Computing System Using Real-Time Tracking Method.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

A Novel Sensing Circuit with Large Sensing Margin for Embedded Spin-Transfer Torque MRAMs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A High Slew Rate CMOS OTA with Dynamic Current Boosting Paths.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

A Novel TFET 8T-SRAM Cell with Improved Noise Margin and Stability.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017
STT-RAM Energy Reduction Using Self-Referenced Differential Write Termination Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology.
Int. J. Circuit Theory Appl., 2017

Design and Analysis of an Ultra-Low-Power Second-Order Asynchronous Delta-Sigma Modulator.
Circuits Syst. Signal Process., 2017

Ultra-Fast SOT-MRAM Cell with STT Current for Deterministic Switching.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

Multilevel SOT-MRAM cell with a novel sensing scheme for high-density memory applications.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

An energy efficient neuromorphic computing system using real time sensing method.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017

2016
Low-Energy Write Operation for 1T-1MTJ STT-RAM Bitcells With Negative Bitline Technique.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A low-power fast tag comparator by modifying charging scheme of wide fan-in dynamic OR gates.
Integr., 2016

A wearable ear-EEG recording system based on dry-contact active electrodes.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

A low-power analog front-end neural acquisition design for seizure detection.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

A 1.62 µW 8-channel ultra-high input impedance EEG amplifier for dry and non-contact biopotential recording applications.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Low-power comparator in 65-nm CMOS with reduced delay time.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

A low-power time-based phase-domain analog-to-digital converter.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Pain detection from facial images using unsupervised feature learning approach.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

2015
A new write assist technique for SRAM design in 65 nm CMOS technology.
Integr., 2015

Low-voltage 9T FinFETSRAM cell for low-power applications.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Symmetric write operation for 1T-1MTJ STT-RAM cells using negative bitline technique.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

STT-RAM write energy consumption reduction by differential write termination method.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

2014
Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology.
Microelectron. J., 2014

A new asymmetric 6T SRAM cell with a write assist technique in 65 nm CMOS technology.
Microelectron. J., 2014

8T-SRAM Cell with Improved Read and Write Margins in 65 nm CMOS Technology.
Proceedings of the VLSI-SoC: Internet of Things Foundations, 2014

Improved read and write margins using a novel 8T-SRAM cell.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014

Comparative study of FinFETs versus 22nm bulk CMOS technologies: SRAM design perspective.
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

Robust subthreshold 7T-SRAM cell for low-power applications.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013
Adaptation of cerebral oxygen metabolism and blood flow and modulation of neurovascular coupling with prolonged stimulation in human visual cortex.
NeuroImage, 2013

Luminance contrast of a visual stimulus modulates the BOLD response more than the cerebral blood flow response in the human brain.
NeuroImage, 2013

Domino logic designs for high-performance and leakage-tolerant applications.
Integr., 2013

Composability Verification of Real Time System Models Using Colored Petri Nets.
Proceedings of the 15th International Conference on Computer Modelling and Simulation, 2013

Solving Battalion Rescheduling Problem Using Multi-objective Genetic Algorithms.
Proceedings of the AsiaSim 2013, 2013

2012
A framework for simulation-based optimization of business process models.
Simul., 2012

Attention strongly increases oxygen metabolic response to stimulus in primary visual cortex.
NeuroImage, 2012

Verifying Dynamic Semantic Composability of BOM-Based Composed Models Using Colored Petri Nets.
Proceedings of the 26th ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation, 2012

Datapath design using asymmetrically-doped FinFET.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

Flip-flop design using novel pulse generation technique.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011
A model for estimating the performance of a team of agents.
Proceedings of the IEEE International Conference on Systems, 2011

Fairness Verification of BOM-Based Composed Models Using Petri Nets.
Proceedings of the 25th ACM/IEEE/SCS Workshop on Principles of Advanced and Distributed Simulation, 2011

Multi-level wordline driver for low power SRAMs in nano-scale CMOS technology.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

2010
Simulation-based decision support for effects-based planning.
Proceedings of the IEEE International Conference on Systems, 2010

New SRAM design using body bias technique for ultra low power applications.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Rail-to-rail low-power fully differential OTA utilizing adaptive biasing and partial feedback.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Data-dependant sense-amplifier flip-flop for low power applications.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
A rule-based semantic matching of base object models.
Int. J. Simul. Process. Model., 2009

Estimating Performance of a Business Process Model.
Proceedings of the 2009 Winter Simulation Conference, 2009

Improved write margin 6T-SRAM for low supply voltage applications.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

Low Phase-Noise and Wide Tuning-Range CMOS Differential VCO for Frequency ?S Modulator.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009

New subthreshold concepts in 65nm CMOS technology.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

Ultra Low Power Full Adder Topologies.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Novel Low Voltage Current-mirror Sense Amplifier based Flip-Flop with Reduced Delay Time.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Low phase-noise VCO utilizing NMOS symmetric load for Frequency-based Delta-Sigma Modulators.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

Statemachine Matching in BOM Based Model Composition.
Proceedings of the 13th IEEE/ACM International Symposium on Distributed Simulation and Real Time Applications, 2009

2008
A Framework for Component Based Modelling and Simulation using BOMs and Semantic Web Technology.
PhD thesis, 2008

65NM sub-threshold 11T-SRAM for ultra low voltage applications.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Novel start-up circuit with enhanced power-up characteristic for bandgap references.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

An Agent-Based Environment for Simulation Model Composition.
Proceedings of the 22st International Workshop on Principles of Advanced and Distributed Simulation, 2008

2007
Top-down biases win against focal attention in the fusiform face area.
NeuroImage, 2007

Activity in the Visual Cortex is Modulated by Top-Down Attention Locked to Reaction Time.
J. Cogn. Neurosci., 2007

A Rule-based Approach to Syntactic and Semantic Composition of BOMs.
Proceedings of the 11th IEEE International Symposium on Distributed Simulation and Real-Time Applications, 2007

Component-Based Simulation Model Development Using BOMs and Web Services.
Proceedings of the First Asia International Conference on Modelling and Simulation, 2007

SDR: A Semantic Based Distributed Repository for Simulation Models and Resources.
Proceedings of the First Asia International Conference on Modelling and Simulation, 2007

A Platform for Simulation of Crises in Urban Environments.
Proceedings of the First Asia International Conference on Modelling and Simulation, 2007

2006
Evaluation of a Fault-Tolerance Mechanism for HLA-Based Distributed Simulations.
Proceedings of the 20th IEEE/ACM/SCS Workshop on Principles of Advanced and Distributed Simulation, 2006

Simulation Model Composition using BOMs.
Proceedings of the 10th IEEE International Symposium on Distributed Simulation and Real-Time Applications (DS-RT 2006), 2006

2005
A framework for fault-tolerance in HLA-based distributed simulations.
Proceedings of the 37th Winter Simulation Conference, Orlando, FL, USA, December 4-7, 2005, 2005

A high speed and leakage-tolerant domino logic for high fan-in gates.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Building a CSCW Infrastructure Utilizing an M&S Architecture and XML.
Proceedings of the Cooperative Design, 2005

2004
Peer-to-Peer-Based Resource Management in Support of HLA-Based Distributed Simulations.
Simul., 2004

Information coding and oscillatory activity in synfire neural networks with and without inhibitory coupling.
Biol. Cybern., 2004

2003
Automatic SOM Compatibility Check and FOM Development.
Proceedings of the 7th IEEE International Symposium on Distributed Simulation and Real-Time Applications (DS-RT 2003), 2003

2001
Some Ownership Management Issues in Distributed Simulation using HLA/RTI.
Scalable Comput. Pract. Exp., 2001

An agent-based DDM for high level architecture.
Proceedings of the 15th Workshop on Parallel and Distributed Simulation, 2001

Aggregation/Disaggregation in HLA Multi-Resolution Distributed Simulation.
Proceedings of the 5th IEEE International Workshop on Distributed Simulation and Real-Time Applications (DS-RT 2001), 2001

2000
Optimizing cell-size in grid-based DDM.
Proceedings of the 14th Workshop on Parallel and Distributed Simulation, 2000

An Agent-Based DDM Filtering Mechanism.
Proceedings of the MASCOTS 2000, Proceedings of the 8th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, 29 August, 2000

Grid-Based Data Management in Distributed Simulation.
Proceedings of the Proceedings 33th Annual Simulation Symposium (SS 2000), 2000

1999
A Psychophysical Approach to the Mechanism of Human Stereovision.
Proceedings of the Foundations and Tools for Neural Modeling, 1999

Object and Ownership Management in Air Traffic Control Simulations.
Proceedings of the 3rd International Workshop on Distributed Interactive Simulation and Real-Time Applications (DIS-RT '99), 1999


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