Viera Stopjaková

Orcid: 0000-0002-0010-8965

According to our database1, Viera Stopjaková authored at least 105 papers between 1997 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
0.3-V, 357.4-nW Voltage-Mode First-Order Analog Filter Using a Multiple-Input VDDDA.
IEEE Access, 2023

Design of the Slope Detection Circuit for On-Chip Current Sensing.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023

Low-Power CMOS Frequency Comparator.
Proceedings of the 46th MIPRO ICT and Electronics Convention, 2023

Design of Ultra-Low Power Comparator in 65 NM CMOS Technology with Rail-to-Rail Input Range.
Proceedings of the IEEE AFRICON 2023, Nairobi, Kenya, September 20-22, 2023, 2023

2022
A 0.3-V High Linear Rail-to-Rail Bulk-Driven OTA in 0.13 μm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

0.5 V, nW-Range Universal Filter Based on Multiple-Input Transconductor for Biosignals Processing.
Sensors, 2022

Low-Power Rail-to-Rail Comparator in 130 nm CMOS Technology.
Proceedings of the 32nd International Conference Radioelektronika, 2022

High Power Supply Rejection LDO Regulator for Switching Applications.
Proceedings of the 45th Jubilee International Convention on Information, 2022

Histogram memory reduction in FPGA gradient edge detectors.
Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

On-Chip Current Sensing Approaches for DC-DC Converters.
Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

Autocalibration Approach for Improving Robustness of Analog ICs.
Proceedings of the 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2022

2021
The Concept of Advanced Multi-Sensor Monitoring of Human Stress.
Sensors, 2021

Low-Voltage DC-DC Converter for IoT and On-Chip Energy Harvester Applications.
Sensors, 2021

Maximum Power Point Tracking Circuit for an Energy Harvester in 130 nm CMOS Technology.
CoRR, 2021

Investigation of Inductor-based Fully On-chip Boost Converter.
Proceedings of the 2021 28th International Conference on Mixed Design of Integrated Circuits and System, 2021

Fully On-Chip Low-Drop Regulator for Low-Power Applications.
Proceedings of the 44th International Convention on Information, 2021

EKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design.
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

Enhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration.
Proceedings of the 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2021

EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method.
Proceedings of the 2021 IEEE AFRICON, 2021

2020
Novel efficient on-chip task scheduler for multi-core hard real-time systems.
Microprocess. Microsystems, 2020

Autonomous On-Chip Digital Calibration for Analog ICs in Nanotechnologies.
Proceedings of the 30th International Conference Radioelektronika, 2020

Development of test equipment for evaluation of low-power AC/DC converter ASIC.
Proceedings of the 30th International Conference Radioelektronika, 2020

Low-Leakage ESD Structures in 130nm CMOS Technology.
Proceedings of the 30th International Conference Radioelektronika, 2020

ASIC Architecture and Implementation of RED Scheduler for Mixed-Criticality Real-Time Systems.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020

Multi-Topology DC-DC Converter for Low-Voltage Energy Harvesting Systems.
Proceedings of the 43rd International Convention on Information, 2020

RED-based Scheduler on Chip for Mixed-Criticality Real-Time Systems.
Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

Dynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology.
Proceedings of the 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2020

2019
A Novel On-Chip Task Scheduler for Mixed-Criticality Real-Time Systems.
J. Circuits Syst. Comput., 2019

Towards Energy-autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

Voltage-to-Frequency Converter for Ultra-Low-Voltage Applications.
Proceedings of the 42nd International Convention on Information and Communication Technology, 2019

A New Hardware-Accelerated Scheduler for Soft Real-Time Tasks.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019

International Symposium on Design and Diagnostics of Electronic Circuits and Systems.
Proceedings of the IEEE International Test Conference, 2019

High side power MOSFET switch driver for a low-power AC/DC converter.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Ultra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Investigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Low Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems.
Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

Performance Analysis Of Ultra Low-Voltage Rail-to-Rail Comparator In 130 nm CMOS Technology.
Proceedings of the 2019 IEEE AFRICON, Accra, Ghana, September 25-27, 2019, 2019

2018
Ultra-low-voltage boosted driver for self-powered systems.
Microelectron. Reliab., 2018

Reliable real-time task scheduler based on Rocket Queue architecture.
Microelectron. Reliab., 2018

Bulk-driven fully differential difference amplifier for ultra-low voltage applications.
Proceedings of the 41st International Convention on Information and Communication Technology, 2018

A novel hardware-accelerated real-time task scheduler based on robust earliest deadline algorithm.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

A Novel Hardware-Accelerated Priority Queue for Real-Time Systems.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Self Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Design and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Heap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

Two-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2017
Foreword.
J. Circuits Syst. Comput., 2017

A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits.
J. Circuits Syst. Comput., 2017

130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications.
J. Circuits Syst. Comput., 2017

A new efficient sorting architecture for real-time systems.
Proceedings of the 6th Mediterranean Conference on Embedded Computing, 2017

Ultra-low-voltage driver for large load capacitance in 130nm CMOS technology.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

Rocket Queue: New data sorting architecture for real-time systems.
Proceedings of the 20th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2017

Low-power bulk-driven rail-to-rail comparator in 130 nm CMOS technology.
Proceedings of the IEEE AFRICON 2017, Cape Town, South Africa, September 18-20, 2017, 2017

2016
Fully Differential Difference Amplifier for Low-Noise and Low-Distortion Applications.
J. Circuits Syst. Comput., 2016

Task scheduler for dual-core real-time systems.
Proceedings of the 2016 MIXDES, 2016

Variable-gain amplifier for ultra-low voltage applications in 130nm CMOS technology.
Proceedings of the 39th International Convention on Information and Communication Technology, 2016

Improved Task Scheduler for Dual-Core Real-Time Systems.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

CMOS variable-gain amplifier for low-frequency applications.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Comparison of gate-driven and bulk-driven current mirror topologies.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Impedance calculation based method for AC fault analysis of mixed-signal circuits.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology.
Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2015
Investigation of the optimum oscillation frequency value towards increasing the efficiency of OBIST approach.
Microelectron. Reliab., 2015

Readout interface for capacitive MEMS microphone in CMOS technology.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015

Design of In AlN/GaN Heterostructure-Based Logic Cells.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

Fully Differential Difference Amplifier for Low-Noise Applications.
Proceedings of the 18th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2015

2014
BIST architecture for oscillation test of analog ICs and investigation of test hardware influence.
Microelectron. Reliab., 2014

A new I<sub>DDT</sub> test approach and its efficiency in covering resistive opens in SRAM arrays.
Microprocess. Microsystems, 2014

Current Sensing Completion Detection in Single-Rail Asynchronous Systems.
Comput. Informatics, 2014

Novel architecture of a digital neuron for FFNN employing special multiplication.
Proceedings of the ECAI 2014 - 21st European Conference on Artificial Intelligence, 18-22 August 2014, Prague, Czech Republic, 2014

An approach towards selection of the oscillation frequency for oscillation test of analog ICs.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

A novel impedance calculation method and its time efficiency evaluation.
Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013
Completion detection in dual-rail asynchronous systems by current-sensing.
Microelectron. J., 2013

Digital methods of offset compensation in 90nm CMOS operational amplifiers.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

Numerical method for DC fault analysis simplification and simulation time reduction.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

Efficiency of oscillation-based BIST in 90nm CMOS active analog filters.
Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012
Current sensing completion detection in dual-rail asynchronous systems.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

Application of IDDT test towards increasing SRAM reliability in nanometer technologies.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011
Alternative methods for heart-rate sensing.
Proceedings of the 4th International Symposium on Applied Sciences in Biomedical and Communication Technologies, 2011

Current sensing methodology for completion detection in self-timed systems.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Increasing the efficiency of analog OBIST using on-chip compensation of technology variations.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2010
Current Sensing Completion Detection in deep sub-micron technologies.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

The novel approach to wideband RFIC receivers in standard CMOS process.
Proceedings of the 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010

2009
Vertical and horizontal magnetic force sensor and application of sensor in power devices.
Proceedings of the 19th European Conference on Circuit Theory and Design, 2009

Power devices current monitoring using horizontal and vertical magnetic force sensor.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

Comparison of different test strategies on a mixed-signal circuit.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008
DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits.
IEEE Trans. Ind. Electron., 2008

Automated Synchronous-to-Asynchronous Circuits Conversion: A Survey.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008

On-chip supply current monitoring units using magnetic force sensing.
Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, 2008

Portable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

On-chip Integration of Magnetic Force Sensing Current Monitors.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology.
Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008

2007
Clockless Implementation of LEON2 for Low-Power Applications.
Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

2006
DefSim: CMOS Defects on Chip for Research and Education.
Proceedings of the 7th Latin American Test Workshop, 2006

New Current Monitor Using Auto Zero Voltage Comparator for IDD Testing of Mixed-signal Circuits.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

PCA Data Preprocessing for Neural Network-based Detection of Parametric Defects in Analog IC.
Proceedings of the 9th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2006), 2006

2005
Defect detection in analog and mixed circuits by neural networks using wavelet analysis.
IEEE Trans. Reliab., 2005

2004
Classification of Defective Analog Integrated Circuits Using Artificial Neural Networks.
J. Electron. Test., 2004

2002
Application of Feed-forward Artificial Neural Networks to the Identification of Defective Analog Integrated Circuits.
Neural Comput. Appl., 2002

Neural Networks-Based Parametric Testing of Analog IC.
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002

2000
I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test.
Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW 2000), 2000

1999
On-Chip Transient Current Monitor for Testing of Low Voltage CMOS IC.
Proceedings of the 1999 Design, 1999

1997
CCII+ current conveyor based BIC monitor for I<sub>DDQ</sub> testing of complex CMOS circuits.
Proceedings of the European Design and Test Conference, 1997


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