Michael Buttrick

According to our database1, Michael Buttrick authored at least 2 papers between 2011 and 2012.

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Bibliography

2012
On Testing Prebond Dies with Incomplete Clock Networks in a 3D IC Using DLLs.
J. Electron. Test., 2012

2011
Mitigating Partitioning, Routing, and Yield Concerns in 3D ICs by Multiplexing TSVs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011


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