Michael Buttrick

According to our database¹, Michael Buttrick authored at least 2 papers in 2011.

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Timeline

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2011

Mitigating Partitioning, Routing, and Yield Concerns in 3D ICs by Multiplexing TSVs.

[DOI]

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

On testing prebond dies with incomplete clock networks in a 3D IC using DLLs.

[DOI]

Proceedings of the Design, Automation and Test in Europe, 2011