Michael Choi

According to our database1, Michael Choi authored at least 12 papers between 2009 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
A 9.1-ENOB 6-mW 10-Bit 500-MS/s Pipelined-SAR ADC With Current-Mode Residue Processing in 28-nm CMOS.
J. Solid-State Circuits, 2019

2018
A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling.
J. Solid-State Circuits, 2018

Imperfect information transmission and adverse selection in asset markets.
J. Economic Theory, 2018

A noise-immune stylus analog front-end using adjustable frequency modulation and linear-interpolating data reconstruction for both electrically coupled resonance and active styluses.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
Ordinal aggregation results via Karlin's variation diminishing property.
J. Economic Theory, 2017

2015
A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC.
J. Solid-State Circuits, 2015

2014
A fully-differential capacitive touch controller with input common-mode feedback for symmetric display noise cancellation.
Proceedings of the Symposium on VLSI Circuits, 2014

2013
An 8.6 ENOB 900MS/s time-interleaved 2b/cycle SAR ADC with a 1b/cycle reconfiguration for resolution enhancement.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2012
Close-proximity, real-time thermoacoustic sensors: Design, characterization, and testing.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

A 7b 1GS/s 7.2mW nonbinary 2b/cycle SAR ADC with register-to-DAC direct control.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2010
A 10b 120MS/s 45nm CMOS ADC using A re-configurable three-stage switched op-amp.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
A 9.43-ENOB 160MS/s 1.2V 65nm CMOS ADC based on multi-stage amplifiers.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009


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