Michael Eisenring

According to our database, Michael Eisenring authored at least 10 papers between 1998 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2002

Communication channel synthesis for heterogeneous embedded systems.

Michael Eisenring

PhD thesis, 2002

A Framework for Run-time Reconfigurable Systems.

Michael Eisenring, Marco Platzner

J. Supercomput., 2002

Communication channel synthesis for heterogeneous embedded systems.

Michael Eisenring

TIK-Schriftenreihe 45, vdf, ISBN: 978-3-7281-2867-6, 2002

2000

Conflicting Criteria in Embedded System Design.

Michael Eisenring, Lothar Thiele, Eckart Zitzler

IEEE Des. Test Comput., 2000

An Implementation Framework for Run-time Reconfigurable Systems.

Michael Eisenring, Marco Platzner

Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Optimization of Run-Time Reconfigurable Embedded Systems.

Michael Eisenring, Marco Platzner

Proceedings of the Field-Programmable Logic and Applications, 2000

1999

Communication Synthesis for Reconfigurable Embedded Systems.

Michael Eisenring, Marco Platzner, Lothar Thiele

Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998

Rapid Prototyping of Dataflow Programs on Hardware/Software Architectures.

Michael Eisenring, Jürgen Teich, Lothar Thiele

Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

Interfacing Hardware and Software.

Michael Eisenring, Jürgen Teich

Proceedings of the Field-Programmable Logic and Applications, 1998

Domain-specific interface generation from dataflow specifications.

Michael Eisenring, Jürgen Teich

Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998