Michael Herz

According to our database1, Michael Herz authored at least 20 papers between 1996 and 2002.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2002
Memory addressing organization for stream-based reconfigurable computing.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

2001
High performance memory communication architectures for coarse grained reconfigurable computing systems.
PhD thesis, 2001

2000
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures.
Proceedings of the Field-Programmable Logic and Applications, 2000

Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract).
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2000

Remote System Management Principles.
Proceedings of the 2000 IEEE International Conference on Cluster Computing (CLUSTER 2000), November 28th, 2000

Agilent's Key Technologies in Remote System Management.
Proceedings of the 2000 IEEE International Conference on Cluster Computing (CLUSTER 2000), November 28th, 2000

KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array.
Proceedings of ASP-DAC 2000, 2000

1999
Interfacing the MoM-PDA to an Internet-based Development System.
Proceedings of the 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), 1999

XMDS: The Xputer Multimedia Development System.
Proceedings of the 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), 1999

An Internet Based Development Framework for Reconfigurable Computing.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

Mapping Applications onto Reconfigurable Kress Arrays.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999

1998
On Reconfigurable Co-processing Units.
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators.
Proceedings of the Field-Programmable Logic and Applications, 1998

Designing for Xilinx XC6200 FPGAs.
Proceedings of the Field-Programmable Logic and Applications, 1998

Parallelization in Co-Compilation for Configurable Accelerators.
Proceedings of the ASP-DAC '98, 1998

1997
Data scheduling to increase performance of parallel accelerators.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

A Novel Sequencer Hardware for Application Specific Computing.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

A Novel Universal Sequencer Hardware.
Proceedings of the Architektur von Rechensystemen, Arbeitsteilige Systemarchitekturen: Konzepte, Lösungen, Anwendungen, Trends, 1997

1996
A Partitioning Programming Environment for a Novel Parallel Architecture.
Proceedings of IPPS '96, 1996

A Synthesis System For Bus-Based Wavefront Array Architectures.
Proceedings of the 1996 International Conference on Application-Specific Systems, 1996


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