Michael Yoeli

According to our database1, Michael Yoeli authored at least 38 papers between 1959 and 1995.

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Bibliography

1995
Self-timed is self-checking.
J. Electron. Test., 1995

1994
An Equivalence Theorem for Labeled Marked Graphs.
IEEE Trans. Parallel Distributed Syst., 1994

Methodology and System for Practical Formal Verification of Reactive Hardware.
Proceedings of the Computer Aided Verification, 6th International Conference, 1994

1993
Self-Timed Architecture of a Reduced Instruction Set Computer.
Proceedings of the Asynchronous Design Methodologies, Proceedings of the IFIP WG10.5 Working Conference on Asynchronous Design Methodologies, Manchester, UK, 31 March, 1993

1992
Implementing Sequential Machines as Self-Timed Circuits.
IEEE Trans. Computers, 1992

An Efficient Implementation of Boolean Functions as Self-Timed Circuits.
IEEE Trans. Computers, 1992

1989
An efficient implementation of Boolean functions nd finite state machine as self-timed circuit.
SIGARCH Comput. Archit. News, 1989

1987
Combinational static CMOS networks.
Integr., 1987

1986
Combinatorial Static CMOD Networks (Extended Summary).
Proceedings of the VLSI Algorithms and Architectures, 1986

1985
Reducibility of Synchronization Structures.
Theor. Comput. Sci., 1985

1984
Towards a Hierarchy of Nets.
J. Comput. Syst. Sci., 1984

A Communicating System Net Model for Specification and Verification of Distributed Nets.
Proceedings of the Protocol Specification, 1984

1983
Super-Nets and their Hierarchy.
Theor. Comput. Sci., 1983

1982
Behavioral Equivalence of Concurrent Systems.
Proceedings of the Applications and Theory of Petri Nets, 1982

1981
Synthesis of Concurrent Systems.
Proceedings of the Application and Theory of Petri Nets, 1981

1980
Vector Addition Systems and Regular Languages.
J. Comput. Syst. Sci., 1980

Control Nets for Parallel Processing.
Proceedings of the Information Processing, Proceedings of the 8th IFIP Congress 1980, Tokyo, Japan - October 6-9, 1980 and Melbourne, Australia, 1980

1979
On a Ternary Model of Gate Networks.
IEEE Trans. Computers, 1979

1978
A Practical Approach to Fault Detection in Combinational Networks.
IEEE Trans. Computers, 1978

1974
Models for Analysis of Races in Sequential Networks.
Proceedings of the Mathematical Foundations of Computer Science, 1974

1972
Buchbesprechungen.
Computing, 1972

1970
The Synthesis of Multivalued Cellular Cascades.
IEEE Trans. Computers, 1970

R70-26 Probabilistic Aspects of Machine Decomposition Theory.
IEEE Trans. Computers, 1970

1969
Group Functions and Multi-Valued Cellular Cascades
Inf. Control., November, 1969

1968
Ternary Cellular Cascades.
IEEE Trans. Computers, 1968

Irreducible Decompositions of Transformation Graphs by Assignment Techniques.
IEEE Trans. Computers, 1968

Subdirect Decompositions of Transformation Graphs
Inf. Control., 1968

1967
Decompositions of Group Functions with Applications to Two-Rail Cascades
Inf. Control., June, 1967

1965
Canonical Representations of Chain Events
Inf. Control., April, 1965

Logical Design of Ternary Switching Circuits.
IEEE Trans. Electron. Comput., 1965

A New Reader Service-Publication of Informational Retrieval Catalog Cards.
IEEE Trans. Electron. Comput., 1965

A Group-Theoretical Approach to Two-Rail Cascades.
IEEE Trans. Electron. Comput., 1965

Generalized Cascade Decompositions of Automata.
J. ACM, 1965

1964
Application of Ternary Algebra to the Study of Static Hazards.
J. ACM, 1964

1963
Counting with Nonlinear Binary Feedback Shift Registers.
IEEE Trans. Electron. Comput., 1963

Cascade-Parallel Decompositions of Sequential Machines.
IEEE Trans. Electron. Comput., 1963

1961
The Cascade Decomposition of Sequential Machines.
IRE Trans. Electron. Comput., 1961

1959
The theory of switching nets.
IRE Trans. Inf. Theory, 1959


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