Mike Smart

Orcid: 0009-0006-8396-5765

According to our database1, Mike Smart authored at least 5 papers between 2025 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Design-Driven Exploration of MOM Capacitors for Capacitive Neural Networks.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026

2025
Weight Mapping Properties of a Dual Tree Single Clock Adiabatic Capacitive Neuron.
CoRR, September, 2025

The Adiabatic Capacitive Neuron: A Cross CMOS Technology Performance Comparison.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Low Offset, High-Resolution Threshold Logic Design in 22nm FDSOI.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2025

Dealing with Non-Idealities of Power-Clock Generation for Adiabatic Systems.
Proceedings of the 32nd IEEE International Conference on Electronics, Circuits and Systems, 2025


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