Minh S. Q. Truong

Orcid: 0000-0001-8430-2513

According to our database1, Minh S. Q. Truong authored at least 2 papers between 2021 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2022
Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2022

2021
RACER: Bit-Pipelined Processing Using Resistive Memory.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021


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