Mitsuo Ikeda

According to our database, Mitsuo Ikeda authored at least 22 papers between 1996 and 2018.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2018

A Single-Chip 4K 60-fps 4: 2: 2 HEVC Video Encoder LSI Employing Efficient Motion Estimation and Mode Decision Framework With Scalability to 8K.

Takayuki Onishi, Takashi Sano, Yukikuni Nishida, Kazuya Yokohari, Ken Nakamura, Koyo Nitta, Kimiko Kawashima, Jun Okamoto, Naoki Ono, Atsushi Sagata, Hiroe Iwasaki, Mitsuo Ikeda, Atsushi Shimizu

IEEE Trans. Very Large Scale Integr. Syst., 2018

An HEVC real-time encoding system with high quality HDR color representations.

Daisuke Kobayashi, Ken Nakamura, Takayuki Onishi, Yasuyuki Nakajima, Hiroe Iwasaki, Mitsuo Ikeda, Atsushi Shimizu

Proceedings of the IEEE International Conference on Consumer Electronics, 2018

2015

Single-chip 4K 60fps 4: 2: 2 HEVC video encoder LSI with 8K scalability.

Takayuki Onishi, Takashi Sano, Yukikuni Nishida, Kazuya Yokohari, Jia Su, Ken Nakamura, Koyo Nitta, Kimiko Kawashima, Jun Okamoto, Naoki Ono, Ritsu Kusaba, Atsushi Sagata, Hiroe Iwasaki, Mitsuo Ikeda, Atsushi Shimizu

Proceedings of the Symposium on VLSI Circuits, 2015

Professional H.265/HEVC encoder LSI toward high-quality 4K/8K broadcast infrastructure.

Hiroe Iwasaki, Takayuki Onishi, Ken Nakamura, Koyo Nitta, Takashi Sano, Yukikuni Nishida, Kazuya Yokohari, Jia Su, Naoki Ono, Ritsu Kusaba, Atsushi Sagata, Mitsuo Ikeda, Atsushi Shimizu

Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

H.265/HEVC encoder for UHDTV.

Mitsuo Ikeda

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2013

Residue role assignment based transform partition predetermination on HEVC.

Jia Su, Koyo Nitta, Mitsuo Ikeda, Atsushi Shimizu

Proceedings of the IEEE International Conference on Image Processing, 2013

2012

An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting Infrastructures.

Koyo Nitta, Hiroe Iwasaki, Takayuki Onishi, Takashi Sano, Atsushi Sagata, Yasuyuki Nakajima, Minoru Inamori, Ryuichi Tanida, Atsushi Shimizu, Ken Nakamura, Mitsuo Ikeda, Jiro Naganuma

IEICE Trans. Electron., 2012

MVC real-time video encoder for full-HDTV 3D video.

Mitsuo Ikeda, Takayuki Onishi, Takashi Sano, Atsushi Sagata, Hiroe Iwasaki, Yasuyuki Nakajima, Koyo Nitta, Yasuko Takahashi, Kazuya Yokohari, Daisuke Kobayashi, Kazuto Kamikura, Hirohisa Jozawa

Proceedings of the IEEE International Conference on Consumer Electronics, 2012

2008

Multi-reference and multi-block-size motion estimation with flexible mode selection for professional 4: 2: 2 H.264/AVC encoder LSI.

Takayuki Onishi, Takashi Sano, Koyo Nitta, Mitsuo Ikeda, Jiro Naganuma

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007

Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level.

Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Toshihiro Minami, Makoto Endo, Yoshiyuki Yashima

IEEE Trans. Very Large Scale Integr. Syst., 2007

2006

Highly accurate de-jittering scheme for broadcast quality video transmission.

Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima

Syst. Comput. Jpn., 2006

2005

New set-top box for interactive visual communication of home entertainment using MPEG-2 full-duplex CODEC LSI.

Minoru Inamori, Hiroe Iwasaki, Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Yoshiyuki Yashima

IEEE Trans. Consumer Electron., 2005

2004

A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level.

Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level.

Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Makoto Endo

Proceedings of the 2003 Design, 2003

A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems.

Hiroe Iwasaki, Jiro Naganuma, Yasuyuki Nakajima, Yutaka Tashiro, Ken Nakamura, Takeshi Yoshitome, Takayuki Onishi, Mitsuo Ikeda, Takaaki Izuoka, Makoto Endo

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2000

Global Rate Control Scheme for MPEG-2 HDTV Parallel Encoding System.

Ken Nakamura, Mitsuo Ikeda, Takeshi Yoshitome, Takeshi Ogura

Proceedings of the 2000 International Symposium on Information Technology (ITCC 2000), 2000

1999

A 4: 2: 2P@ML MPEG-2 video encoder board using an enhanced MP@ML video encoder LSI.

Takeshi Yoshitome, Toshihiro Minami, Mitsuo Ikeda, Koyo Nitta, Kazuhito Suguri

IEEE Trans. Consumer Electron., 1999

Concurrent and collaborative methodologies in short TAT LSI design and manufacturing.

Tsuneo Okubo, Mitsuo Ikeda, Yutaka Tashiro, Toshio Kondo, Ryota Kasai, Hiroshi Kotera, Tetsuma Sakurai

Syst. Comput. Jpn., 1999

SuperENC: MPEG-2 video encoder chip.

Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi, Tsuneo Okubo, Ryota Kasai

IEEE Micro, 1999

An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture.

Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Jiro Naganuma, Takeshi Ogura

Proceedings of the 1999 Design, 1999

1996

Two-chip MPEG-2 video encoder.

Toshio Kondo, Kazuhito Suguri, Mitsuo Ikeda, Tetsuya Abe, Hiroaki Matsuda, Tsuneo Okubo, Kenji Ogura, Yutaka Tashiro, Naoki Ono, Toshihiro Minami, Ritsu Kusaba, Takeshi Ikenaga, Nobutaro Shibata, Ryota Kasai, Koji Otsu, Fumiaki Nakagawa, Yasuhiko Sato

IEEE Micro, 1996

A Hardware/Software Concurrent Design for a Real-Time SP@ML MPEG2 Video-Encoder Chip Set.

Mitsuo Ikeda, Tsuneo Okubo, Tetsuya Abe, Yoshinori Ito, Yutaka Tashiro, Ryota Kasai

Proceedings of the 1996 European Design and Test Conference, 1996