Mohammad Haji Seyed Javadi

Orcid: 0000-0003-4591-2401

According to our database1, Mohammad Haji Seyed Javadi authored at least 8 papers between 2007 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
A Comprehensive Model for Efficient Design Space Exploration of Imprecise Computational Blocks.
ACM Trans. Embed. Comput. Syst., November, 2023

2020
Small Constant Mean-Error Imprecise Adder/Multiplier for Efficient VLSI Implementation of MAC-Based Applications.
IEEE Trans. Computers, 2020

2017
Efficient utilization of imprecise computational blocks for hardware implementation of imprecision tolerant applications.
Microelectron. J., 2017

2015
Efficient Utilization of Imprecise Blocks for Hardware Implementation of a Gaussian Filter.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

2013
A hardware oriented fuzzification algorithm and its VLSI implementation.
Soft Comput., 2013

Defuzzification block: New algorithms, and efficient hardware and software implementation issues.
Eng. Appl. Artif. Intell., 2013

2011
Congestion and track usage improvement of large FPGAs using metro-on-FPGA methodology.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2007
An Area-Efficient Hardware Implementation for Real-Time Window-Based Image Filtering.
Proceedings of the Third International IEEE Conference on Signal-Image Technologies and Internet-Based System, 2007


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