Morteza Afghahi

According to our database1, Morteza Afghahi authored at least 5 papers between 1987 and 1992.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1992
Performance of Synchronous and Asynchronous Schemes for VLSI Systems.
IEEE Trans. Computers, 1992

1991
A 512 16-b bit-serial sorter chip.
IEEE J. Solid State Circuits, October, 1991

Double-edge-triggered D-flip-flops for high-speed CMOS circuits.
IEEE J. Solid State Circuits, August, 1991

1990
A unified single-phase clocking scheme for VLSI systems.
IEEE J. Solid State Circuits, February, 1990

1987
A high speed 2-D discrete cosine transform chip.
Integr., 1987


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