Jiren Yuan

According to our database, Jiren Yuan authored at least 22 papers between 1993 and 2007.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2007

A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 µm CMOS.

Cheng Chen, Jiren Yuan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005

Performance analysis of general charge sampling.

Gang Xu, Jiren Yuan

IEEE Trans. Circuits Syst. II Express Briefs, 2005

Design considerations of a floating-point ADC with embedded S/H.

Johan Piper, Jiren Yuan

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

A programmable analog-to-digital converter.

Gang Xu, Jiren Yuan

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A CMOS 500 MS/S charge sampler.

Gang Xu, Jiren Yuan

Proceedings of the Second IASTED International Conference on Circuits, 2004

2003

An 8-bit 100-MHz CMOS linear interpolation DAC.

Yijun Zhou, Jiren Yuan

IEEE J. Solid State Circuits, 2003

A 10-bit wide-band CMOS direct digital RF amplitude modulator.

Yijun Zhou, Jiren Yuan

IEEE J. Solid State Circuits, 2003

An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average.

Lixin Yang, Jiren Yuan

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A Differential Difference Comparator for multi-step A/D converters.

Gang Xu, Jiren Yuan

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A highly integrated CMOS direct digital RF quadrature modulator.

Yijun Zhou, Jiren Yuan

Proceedings of the ESSCIRC 2003, 2003

2002

A direct digital RF amplitude modulator.

Yijun Zhou, Jiren Yuan

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A non-feedback multiphase clock generator.

Lixin Yang, Yijun Zhou, Jiren Yuan

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001

An 8-Bit, 100-MHz low glitch interpolation DAC.

Yijun Zhou, Jiren Yuan

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

An embedded low power FIR filter.

Gang Xu, Jiren Yuan

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Realization of a floating-point A/D converter.

Johan Piper, Jiren Yuan

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000

Single input current-sensing differential logic (SCSDL).

Roland Strandberg, Jiren Yuan

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

Floating-point analog-to-digital converter.

Jiren Yuan, Johan Piper

Proceedings of the 6th IEEE International Conference on Electronics, Circuits and Systems, 1999

1997

New single-clock CMOS latches and flipflops with improved speed and power savings.

Jiren Yuan, Christer Svensson

IEEE J. Solid State Circuits, 1997

1994

A 3-level asynchronous protocol for a differential two-wire communication link.

Crister Svensson, Jiren Yuan

IEEE J. Solid State Circuits, September, 1994

A 10-bit 5-MS/s successive approximation ADC cell used in a 70-MS/s ADC array in 1.2-μm CMOS.

Jiren Yuan, Crister Svensson

IEEE J. Solid State Circuits, August, 1994

1993

Ultra high speed CMOS design.

Christer Svensson, Jiren Yuan

Proceedings of the VLSI 93, 1993

System Level Policies for Fault Tolerance Issues in the FERMI Project.

A. Dell'Acqua, M. Hansen, Sami J. Inkinen, B. Lofstedt, J. P. Vanuxem, Christer Svensson, Jiren Yuan, H. Hentzell, L. Del Buono, J. David, J. F. Genat, H. Lebbolo, O. LeDortz, P. Nayman, Aurore Savoy-Navarro, R. Zitoun, Cesare Alippi, Luca Breveglieri, Luigi Dadda, Vincenzo Piuri, Fabio Salice, Mariagiovanna Sami, Renato Stefanelli, P. Cattaneo, G. Fumagalli, G. Goggi, Simona Brigati, Umberto Gatti, Franco Maloberti, Guido Torelli, P. Carlson, A. Kerek, Goran Appelquist, S. Berglund, C. Bohm, Magnus Engström, N. Yamdagni, Rolf Sundblad, I. Höglund, S. T. Persson

Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993