Jiren Yuan

According to our database1, Jiren Yuan authored at least 15 papers between 1993 and 2007.

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Bibliography

2007
A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 µm CMOS.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2005
Design considerations of a floating-point ADC with embedded S/H.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A programmable analog-to-digital converter.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

A CMOS 500 MS/S charge sampler.
Proceedings of the Second IASTED International Conference on Circuits, 2004

2003
An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Performance analysis of general charge sampling.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

A Differential Difference Comparator for multi-step A/D converters.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A direct digital RF amplitude modulator.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A non-feedback multiphase clock generator.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
An 8-Bit, 100-MHz low glitch interpolation DAC.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

An embedded low power FIR filter.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Realization of a floating-point A/D converter.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
Single input current-sensing differential logic (SCSDL).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1993
Ultra high speed CMOS design.
Proceedings of the VLSI 93, 1993



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