Nagaraju Pothineni

According to our database1, Nagaraju Pothineni authored at least 6 papers between 2007 and 2010.

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Bibliography

2010
Instruction Selection in ASIP Synthesis Using Functional Matching.
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A high-level synthesis flow for custom instruction set extensions for application-specific processors.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2008
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

2007
Application Specific Datapath Extension with Distributed I/O Functional Units.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007

Recurring Pattern Identification and its Application to Instruction Set Extension.
Proceedings of the 2007 International Conference on Computer Design, 2007


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