Nan Liao

Affiliations:
  • Peking University, Beijing, China


According to our database1, Nan Liao authored at least 13 papers between 2013 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Design of Low-Power High-Performance FinFET Standard Cells.
Circuits Syst. Signal Process., 2018

2017
High-Performance Noninvasive Side-Channel Attack Resistant ECC Coprocessor for GF(2m ).
IEEE Trans. Ind. Electron., 2017

Improving DFA attacks on AES with unknown and random faults.
Sci. China Inf. Sci., 2017

2016
Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology.
IEICE Trans. Electron., 2016

Ultralow-power high-speed flip-flop based on multimode FinFETs.
Sci. China Inf. Sci., 2016

2015
Key characterization factors of accurate power modeling for FinFET circuits.
Sci. China Inf. Sci., 2015

Employing the mixed FBB/RBB in the design of FinFET logic gates.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

A high-efficient and accurate fault model aiming at FPGA-based AES cryptographic applications.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
Ultra-low power dissipation of improved complementary pass-transistor adiabatic logic circuits based on FinFETs.
Sci. China Inf. Sci., 2014

Low power adiabatic logic based on FinFETs.
Sci. China Inf. Sci., 2014

High-speed constant-time division module for Elliptic Curve Cryptography based on GF(2<sup>m</sup>).
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

2013
Leakage Power Reduction of Adiabatic Circuits Based on FinFET Devices.
IEICE Trans. Electron., 2013

A Dynamic-Adjusting Threshold-Voltage Scheme for FinFETs low power designs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013


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