Nandakishore Santhi

Orcid: 0000-0002-4755-7821

According to our database1, Nandakishore Santhi authored at least 51 papers between 2004 and 2023.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
LLVM Static Analysis for Program Characterization and Memory Reuse Profile Estimation.
Proceedings of the International Symposium on Memory Systems, 2023

Modeling and Characterizing Shared and Local Memories of the Ampere GPUs.
Proceedings of the International Symposium on Memory Systems, 2023

BB-ML: Basic Block Performance Prediction using Machine Learning Techniques.
Proceedings of the 29th IEEE International Conference on Parallel and Distributed Systems, 2023

2022
PPT-Multicore: performance prediction of OpenMP applications using reuse profiles and analytical modeling.
J. Supercomput., 2022

BB-ML: Basic Block Performance Prediction using Machine Learning Techniques.
CoRR, 2022

Quantum Netlist Compiler (QNC).
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

Demystifying the Nvidia Ampere Architecture through Microbenchmarking and Instruction-level Analysis.
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022

2021
Machine Learning-enabled Scalable Performance Prediction of Scientific Codes.
ACM Trans. Model. Comput. Simul., 2021

Hybrid, scalable, trace-driven performance modeling of GPGPUs.
Proceedings of the International Conference for High Performance Computing, 2021

Load-Aware Dynamic Time Synchronization in Parallel Discrete Event Simulation.
Proceedings of the SIGSIM-PADS '21: SIGSIM Conference on Principles of Advanced Discrete Simulation, Virtual Event, USA, 31 May, 2021

2020
Optimization Approach to Accelerator Codesign.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Code Characterization With Graph Convolutions and Capsule Networks.
IEEE Access, 2020

PPT-SASMM: Scalable Analytical Shared Memory Model: Predicting the Performance of Multicore Caches from a Single-Threaded Execution Trace.
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020

NVIDIA GPGPUs Instructions Energy Consumption.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

Fast, accurate, and scalable memory modeling of GPGPUs using reuse profiles.
Proceedings of the ICS '20: 2020 International Conference on Supercomputing, 2020

Verified instruction-level energy consumption measurement for NVIDIA GPUs.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

2019
Modeling Shared Cache Performance of OpenMP Programs using Reuse Distance.
CoRR, 2019

Instructions' Latencies Characterization for NVIDIA GPGPUs.
CoRR, 2019

PPT-GPU: Scalable GPU Performance Modeling.
IEEE Comput. Archit. Lett., 2019

Scalable Performance Prediction of Codes with Memory Hierarchy and Pipelines.
Proceedings of the 2019 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation, 2019

GPUs Cache Performance Estimation using Reuse Distance Analysis.
Proceedings of the 38th IEEE International Performance Computing and Communications Conference, 2019

Low Overhead Instruction Latency Characterization for NVIDIA GPGPUs.
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

POSTER: GPUs Pipeline Latency Analysis.
Proceedings of the 30th IEEE International Conference on Application-specific Systems, 2019

2018
Quantum Algorithm Implementations for Beginners.
CoRR, 2018

Just-in-Time Parallel simulation.
Proceedings of the 2018 Winter Simulation Conference, 2018

Parallel Application Performance Prediction Using Analysis Based Models and HPC Simulations.
Proceedings of the 2018 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation, 2018

PPT-GPU: performance prediction toolkit for GPUs identifying the impact of caches: extended abstract.
Proceedings of the International Symposium on Memory Systems, 2018

Synthesis of Parallel Programs on Multi-Cores.
Proceedings of the Handbook of Grammatical Evolution, 2018

2017
Accelerator Codesign as Non-Linear Optimization.
CoRR, 2017

An analytical memory hierarchy model for performance prediction.
Proceedings of the 2017 Winter Simulation Conference, 2017

A Scalable Analytical Memory Model for CPU Performance Prediction.
Proceedings of the High Performance Computing Systems. Performance Modeling, Benchmarking, and Simulation, 2017

Probabilistic Monte Carlo simulations for static branch prediction.
Proceedings of the 36th IEEE International Performance Computing and Communications Conference, 2017

A Probabilistic Monte Carlo Framework for Branch Prediction.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

AMM: Scalable Memory Reuse Model to Predict the Performance of Physics Codes.
Proceedings of the 2017 IEEE International Conference on Cluster Computing, 2017

2016
GPU Performance Prediction Through Parallel Discrete Event Simulation and Common Sense.
EAI Endorsed Trans. Ubiquitous Environ., 2016

Discrete event performance prediction of speculatively parallel temperature-accelerated dynamics.
Simul., 2016

An Integrated Interconnection Network Model for Large-Scale Performance Prediction.
Proceedings of the 2016 annual ACM Conference on SIGSIM Principles of Advanced Discrete Simulation, 2016

2015
The simian concept: parallel discrete event simulation with interpreted languages and just-in-time compilation.
Proceedings of the 2015 Winter Simulation Conference, 2015

Parameterized benchmarking of parallel discrete event simulation systems: communication, computation, and memory.
Proceedings of the 2015 Winter Simulation Conference, 2015

Simian integrated framework for parallel discrete event simulation on GPUs.
Proceedings of the 2015 Winter Simulation Conference, 2015

2012
Optimization principles for arithmetic functions in hardware-software co-design.
Proceedings of the Winter Simulation Conference, 2012

2011
Detecting and Mitigating Abnormal Events in Large Scale Networks: Budget Constrained Placement on Smart Grids.
Proceedings of the 44th Hawaii International International Conference on Systems Science (HICSS-44 2011), 2011

2010
Understanding Cascading Failures in Power Grids
CoRR, 2010

CyberSim: Geographic, temporal, and organizational dynamics of malware propagation.
Proceedings of the 2010 Winter Simulation Conference, 2010

2008
Sparse representations for codes and the hardness of decoding LDPC codes.
Proceedings of the 2008 IEEE International Symposium on Information Theory, 2008

2007
On Algebraic Decoding of q-ary Reed-Muller and Product Reed-Solomon Codes.
Proceedings of the IEEE International Symposium on Information Theory, 2007

2006
Graphical models for coding and computation.
PhD thesis, 2006

On an Improvement over Rényi's Equivocation Bound
CoRR, 2006

Analog Codes on Graphs
CoRR, 2006

Minimum Distance of Codes and Their Branching Program Complexity.
Proceedings of the Proceedings 2006 IEEE International Symposium on Information Theory, 2006

2004
On the effect of parity-check weights in iterative decoding.
Proceedings of the 2004 IEEE International Symposium on Information Theory, 2004


  Loading...