Tobias Grosser

According to our database1, Tobias Grosser authored at least 34 papers between 2010 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
Extracting clean performance models from tainted programs.
Proceedings of the PPoPP '21: 26th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2021

2020
Optimization Approach to Accelerator Codesign.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Polyhedral Compilation for Racetrack Memories.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Declarative Loop Tactics for Domain-specific Optimization.
ACM Trans. Archit. Code Optim., 2020

Fast linear programming through transprecision computing on small and sparse data.
Proc. ACM Program. Lang., 2020

Work-stealing prefix scan: Addressing load imbalance in large-scale image registration.
CoRR, 2020

Domain-Specific Multi-Level IR Rewriting for GPU.
CoRR, 2020

Compiling Neural Networks for a Computational Memory Accelerator.
CoRR, 2020

LLHD: a multi-level intermediate representation for hardware description languages.
Proceedings of the 41st ACM SIGPLAN International Conference on Programming Language Design and Implementation, 2020

Mixed-data-model heterogeneous compilation and OpenMP offloading.
Proceedings of the CC '20: 29th International Conference on Compiler Construction, 2020

Automatic Generation of Multi-Objective Polyhedral Compiler Transformations.
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019
A fast analytical model of fully associative caches.
Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation, 2019

Efficient hierarchical online-autotuning: a case study on polyhedral accelerator mapping.
Proceedings of the ACM International Conference on Supercomputing, 2019

Absinthe: Learning an Analytical Performance Model to Fuse and Tile Stencil Codes in One Shot.
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019

2018
High-Performance Generalized Tensor Operations: A Compiler-Oriented Approach.
ACM Trans. Archit. Code Optim., 2018

DeLICM: scalar dependence removal at zero memory cost.
Proceedings of the 2018 International Symposium on Code Generation and Optimization, 2018

Modeling the conflicting demands of parallelism and Temporal/Spatial locality in affine scheduling.
Proceedings of the 27th International Conference on Compiler Construction, 2018

2017
Accelerator Codesign as Non-Linear Optimization.
CoRR, 2017

Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils.
Proceedings of the 22nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2017

Optimistic loop optimization.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

2016
Polly-ACC Transparent compilation to heterogeneous hardware.
Proceedings of the 2016 International Conference on Supercomputing, 2016

2015
Polyhedral AST Generation Is More Than Scanning Polyhedra.
ACM Trans. Program. Lang. Syst., 2015

Runtime pointer disambiguation.
Proceedings of the 2015 ACM SIGPLAN International Conference on Object-Oriented Programming, 2015

MODESTO: Data-centric Analytic Optimization of Complex Stencil Programs on Heterogeneous Architectures.
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

Optimistic Delinearization of Parametrically Sized Arrays.
Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

PENCIL: A Platform-Neutral Compute Intermediate Language for Accelerator Programming.
Proceedings of the 2015 International Conference on Parallel Architectures and Compilation, 2015

2014
A decoupled approach to high-level loop optimization : tile shapes, polyhedral building blocks and low-level compilers. (Une approche découplée pour l'optimization de boucle à haut niveau).
PhD thesis, 2014

The Relation Between Diamond Tiling and Hexagonal Tiling.
Parallel Process. Lett., 2014

A framework for enhancing data reuse via associative reordering.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2014

Hybrid Hexagonal/Classical Tiling for GPUs.
Proceedings of the 12th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2014

2013
PENCIL: Towards a Platform-Neutral Compute Intermediate Language for DSLs
CoRR, 2013

Split tiling for GPUs: automatic parallelization using trapezoidal tiles.
Proceedings of the 6th Workshop on General Purpose Processor Using Graphics Processing Units, 2013

2012
Polly - Performing Polyhedral Optimizations on a Low-Level Intermediate Representation.
Parallel Process. Lett., 2012

2010
Determining optimal features for emotion recognition from speech by applying an evolutionary algorithm.
Proceedings of the INTERSPEECH 2010, 2010


  Loading...