Nandan Kumar Jha

Orcid: 0000-0001-6334-1740

According to our database1, Nandan Kumar Jha authored at least 14 papers between 2019 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
DeepReShape: Redesigning Neural Networks for Efficient Private Inference.
CoRR, 2023

Characterizing and Optimizing End-to-End Systems for Private Inference.
Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2023

2021
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance.
IEEE Trans. Computers, 2021

CryptoNite: Revealing the Pitfalls of End-to-End Private Inference at Scale.
CoRR, 2021

Sisyphus: A Cautionary Tale of Using Low-Degree Polynomial Activations in Privacy-Preserving Deep Learning.
CoRR, 2021

Circa: Stochastic ReLUs for Private Deep Learning.
Proceedings of the Advances in Neural Information Processing Systems 34: Annual Conference on Neural Information Processing Systems 2021, 2021

DeepReDuce: ReLU Reduction for Fast Private Inference.
Proceedings of the 38th International Conference on Machine Learning, 2021

Digital Storytelling: The Integration of Intangible and Tangible Heritage in the City of Surat, India.
Proceedings of the Culture and Computing. Interactive Cultural Heritage and Arts, 2021

2020
DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs.
ACM J. Emerg. Technol. Comput. Syst., 2020

On the Demystification of Knowledge Distillation: A Residual Network Perspective.
CoRR, 2020

ULSAM: Ultra-Lightweight Subspace Attention Module for Compact Convolutional Neural Networks.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2020

E2GC: Energy-efficient Group Convolution in Deep Neural Networks.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

DRACO: Co-Optimizing Hardware Utilization, and Performance of DNNs on Systolic Accelerator.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

2019
The Ramifications of Making Deep Neural Networks Compact.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019


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