Sparsh Mittal

Orcid: 0000-0002-2908-993X

According to our database1, Sparsh Mittal authored at least 132 papers between 2011 and 2024.

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Bibliography

2024
Harmonized Spatial and Spectral Learning for Robust and Generalized Medical Image Segmentation.
CoRR, 2024

LIVENet: A novel network for real-world low-light image denoising and enhancement.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

SynergyNet: Bridging the Gap between Discrete and Continuous Representations for Precise Medical Image Segmentation.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

Textual Alchemy: CoFormer for Scene Text Understanding.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

Security Implications of Approximation: A Study of Trojan Attacks on Approximate Adders and Multipliers.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

TEFAR: An Efficient Transparent Finer-Grained Encryption of Internet Access Artifacts.
Proceedings of the 16th International Conference on COMmunication Systems & NETworkS, 2024

2023
At the Locus of Performance: Quantifying the Effects of Copious 3D-Stacked Cache on HPC Workloads.
ACM Trans. Archit. Code Optim., December, 2023

PaCL: Patient-aware contrastive learning through metadata refinement for generalized early disease diagnosis.
Comput. Biol. Medicine, December, 2023

A survey of techniques for optimizing transformer inference.
J. Syst. Archit., November, 2023

A Survey of Deep Learning Techniques for Underwater Image Classification.
IEEE Trans. Neural Networks Learn. Syst., October, 2023

VADF: Versatile Approximate Data Formats for Energy-Efficient Computing.
ACM Trans. Embed. Comput. Syst., October, 2023

PCBSegClassNet - A light-weight network for segmentation and classification of PCB component.
Expert Syst. Appl., September, 2023

An active memristor based rate-coded spiking neural network.
Neurocomputing, 2023

SPEEDNet: Salient Pyramidal Enhancement Encoder-Decoder Network for Colonoscopy Images.
CoRR, 2023

Rethinking Intermediate Layers design in Knowledge Distillation for Kidney and Liver Tumor Segmentation.
CoRR, 2023

GAFNet: A Global Fourier Self Attention Based Novel Network for multi-modal downstream tasks.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2023

Machine Learning-based model for Single Event Upset Current Prediction in 14nm FinFETs.
Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

Machine Learning and Polynomial Chaos models for Accurate Prediction of SET Pulse Current.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2023

Novel, Configurable Approximate Floating-point Multipliers for Error-Resilient Applications.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

Dilated Involutional Pyramid Network (DInPNet): A Novel Model for Printed Circuit Board (PCB) Components Classification.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

SpotOn: A Gradient-based Targeted Data Poisoning Attack on Deep Neural Networks.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

TPFNet: A Novel Text In-painting Transformer for Text Removal.
Proceedings of the Document Analysis and Recognition - ICDAR 2023, 2023

FENCE: A Real-Time Privacy-Preserving Solution for Enterprise Internet Forensics at Scale.
Proceedings of the 15th International Conference on COMmunication Systems & NETworkS, 2023

RAxC: Reflexivity-based Approximate Computing techniques for efficient remote sensing.
Proceedings of the IEEE International Conference on Big Data, 2023

ZETA: A Zero-Trust Security based Forensic-Ready Solution for Perimeter-less Enterprise Networks.
Proceedings of the IEEE International Conference on Advanced Networks and Telecommunications Systems, 2023

2022
A Survey of Deep Learning on CPUs: Opportunities and Co-Optimizations.
IEEE Trans. Neural Networks Learn. Syst., 2022

CORIDOR: Using COherence and TempoRal LocalIty to Mitigate Read Disurbance ErrOR in STT-RAM Caches.
ACM Trans. Embed. Comput. Syst., 2022

ClarifyNet: A high-pass and low-pass filtering based CNN for single image dehazing.
J. Syst. Archit., 2022

ACLNet: An Attention and Clustering-based Cloud Segmentation Network.
CoRR, 2022

At the Locus of Performance: A Case Study in Enhancing CPUs with Copious 3D-Stacked Cache.
CoRR, 2022

WaferSegClassNet - A light-weight network for classification and segmentation of semiconductor wafer defects.
Comput. Ind., 2022

NASCENT: A Non-Invasive Solution for Detecting Utilization of Servers in Bare-Metal Cloud.
IEEE Access, 2022

MEGA-MAC: A Merged Accumulation based Approximate MAC Unit for Error Resilient Applications.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

A Node-Embedding Features Based Machine Learning Technique for Dynamic Malware Detection.
Proceedings of the IEEE Conference on Dependable and Secure Computing, 2022

Design and Analysis of Novel Bit-flip Attacks and Defense Strategies for DNNs.
Proceedings of the IEEE Conference on Dependable and Secure Computing, 2022

Ensembling Deep Learning And CIELAB Color Space Model for Fire Detection from UAV images.
Proceedings of the Second International Conference on AI-ML Systems, 2022

2021
Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance.
IEEE Trans. Computers, 2021

A survey of techniques for intermittent computing.
J. Syst. Archit., 2021

A survey of deep learning techniques for vehicle detection from UAV images.
J. Syst. Archit., 2021

A survey of hardware architectures for generative adversarial networks.
J. Syst. Archit., 2021

CURATING: A multi-objective based pruning technique for CNNs.
J. Syst. Archit., 2021

A survey of SRAM-based in-memory computing techniques and applications.
J. Syst. Archit., 2021

A survey of accelerator architectures for 3D convolution neural networks.
J. Syst. Archit., 2021

A survey On hardware accelerators and optimization techniques for RNNs.
J. Syst. Archit., 2021

A survey on hardware security of DNN models and accelerators.
J. Syst. Archit., 2021

Leveraging Prediction Confidence For Versatile Optimizations to CNNs.
Proceedings of the AIMLSystems 2021: The First International Conference on AI-ML-Systems, Bangalore India, October 21, 2021

Inferring DNN layer-types through a Hardware Performance Counters based Side Channel Attack.
Proceedings of the AIMLSystems 2021: The First International Conference on AI-ML-Systems, Bangalore India, October 21, 2021

2020
A survey of FPGA-based accelerators for convolutional neural networks.
Neural Comput. Appl., 2020

A survey on modeling and improving reliability of DNN algorithms and accelerators.
J. Syst. Archit., 2020

DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs.
ACM J. Emerg. Technol. Comput. Syst., 2020

On the Demystification of Knowledge Distillation: A Residual Network Perspective.
CoRR, 2020

A survey on evaluating and optimizing performance of Intel Xeon Phi.
Concurr. Comput. Pract. Exp., 2020

ULSAM: Ultra-Lightweight Subspace Attention Module for Compact Convolutional Neural Networks.
Proceedings of the IEEE Winter Conference on Applications of Computer Vision, 2020

E2GC: Energy-efficient Group Convolution in Deep Neural Networks.
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

DRACO: Co-Optimizing Hardware Utilization, and Performance of DNNs on Systolic Accelerator.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Detecting Usage of Mobile Phones using Deep Learning Technique.
Proceedings of the GoodTechs '20: 6th EAI International Conference on Smart Objects and Technologies for Social Good, 2020

Improving Accuracy and Efficiency of Object Detection Algorithms Using Multiscale Feature Aggregation Plugins.
Proceedings of the Artificial Neural Networks in Pattern Recognition, 2020

2019
A Survey of ReRAM-Based Architectures for Processing-In-Memory and Neural Networks.
Mach. Learn. Knowl. Extr., 2019

A survey of spintronic architectures for processing-in-memory and neural networks.
J. Syst. Archit., 2019

A survey of techniques for optimizing deep learning on GPUs.
J. Syst. Archit., 2019

A survey of encoding techniques for reducing data-movement energy.
J. Syst. Archit., 2019

A survey on applications and architectural-optimizations of Micron's Automata Processor.
J. Syst. Archit., 2019

A Survey on optimized implementation of deep learning models on the NVIDIA Jetson platform.
J. Syst. Archit., 2019

A survey of techniques for improving efficiency of mobile web browsing.
Concurr. Comput. Pract. Exp., 2019

A survey of techniques for dynamic branch prediction.
Concurr. Comput. Pract. Exp., 2019

The Ramifications of Making Deep Neural Networks Compact.
Proceedings of the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems, 2019

Address-stride assisted approximate load value prediction in GPUs.
Proceedings of the ACM International Conference on Supercomputing, 2019

2018
A survey of techniques for improving error-resilience of DRAM.
J. Syst. Archit., 2018

A Survey of Techniques for Improving Security of GPUs.
J. Hardw. Syst. Secur., 2018

A Survey of Techniques for Improving Security of Non-volatile Memories.
J. Hardw. Syst. Secur., 2018

A survey of techniques for architecting SLC/MLC/TLC hybrid Flash memory-based SSDs.
Concurr. Comput. Pract. Exp., 2018

2017
A Survey of Techniques for Architecting and Managing GPU Register File.
IEEE Trans. Parallel Distributed Syst., 2017

A Survey of Techniques for Cache Partitioning in Multicore Processors.
ACM Comput. Surv., 2017

Mitigating Read-disturbance Errors in STT-RAM Caches by Using Data Compression.
CoRR, 2017

A survey of value prediction techniques for leveraging value locality.
Concurr. Comput. Pract. Exp., 2017

A survey of techniques for architecting TLBs.
Concurr. Comput. Pract. Exp., 2017

A survey of techniques for designing and managing CPU register file.
Concurr. Comput. Pract. Exp., 2017

A Survey of Soft-Error Mitigation Techniques for Non-Volatile Memories.
Comput., 2017

Decongest: Accelerating Super-Dense PCM Under Write Disturbance by Hot Page Remapping.
IEEE Comput. Archit. Lett., 2017

Addressing Read-Disturbance Issue in STT-RAM by Data Compression and Selective Duplication.
IEEE Comput. Archit. Lett., 2017

SwapX: An NVM-Based Hierarchical Swapping Framework.
IEEE Access, 2017

Design and Analysis of Soft-Error Resilience Mechanisms for GPU Register File.
Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Architecting SOT-RAM Based GPU Register File.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Building a Fast and Power Efficient Inductive Charge Pump System for 3D Stacked Phase Change Memories.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

2016
EqualWrites: Reducing Intra-Set Write Variations for Enhancing Lifetime of Non-Volatile Caches.
IEEE Trans. Very Large Scale Integr. Syst., 2016

A Survey Of Techniques for Architecting DRAM Caches.
IEEE Trans. Parallel Distributed Syst., 2016

A Survey of Software Techniques for Using Non-Volatile Memories for Storage and Main Memory Systems.
IEEE Trans. Parallel Distributed Syst., 2016

A Survey Of Architectural Approaches for Data Compression in Cache and Main Memory Systems.
IEEE Trans. Parallel Distributed Syst., 2016

A Survey of Techniques for Modeling and Improving Reliability of Computing Systems.
IEEE Trans. Parallel Distributed Syst., 2016

A Survey of Techniques for Cache Locking.
ACM Trans. Design Autom. Electr. Syst., 2016

A Survey of Techniques for Architecting Processor Components Using Domain-Wall Memory.
ACM J. Emerg. Technol. Comput. Syst., 2016

A Survey of Architectural Techniques for Near-Threshold Computing.
ACM J. Emerg. Technol. Comput. Syst., 2016

Reliability Tradeoffs in Design of Volatile and Nonvolatile Caches.
J. Circuits Syst. Comput., 2016

A survey of power management techniques for phase change memory.
Int. J. Comput. Aided Eng. Technol., 2016

A Survey of Recent Prefetching Techniques for Processor Caches.
ACM Comput. Surv., 2016

A Survey of Techniques for Approximate Computing.
ACM Comput. Surv., 2016

A Survey of Architectural Techniques for Managing Process Variation.
ACM Comput. Surv., 2016

A Survey of Techniques for Architecting and Managing Asymmetric Multicore Processors.
ACM Comput. Surv., 2016

Algorithm-Directed Data Placement in Explicitly Managed Non-Volatile Memory.
Proceedings of the 25th ACM International Symposium on High-Performance Parallel and Distributed Computing, 2016

Reducing Soft-error Vulnerability of Caches using Data Compression.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2015
A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-Volatile On-Chip Caches.
IEEE Trans. Parallel Distributed Syst., 2015

A Survey of CPU-GPU Heterogeneous Computing Techniques.
ACM Comput. Surv., 2015

Opportunities for Nonvolatile Memory Systems in Extreme-Scale High-Performance Computing.
Comput. Sci. Eng., 2015

AYUSH: A Technique for Extending Lifetime of SRAM-NVM Hybrid Caches.
IEEE Comput. Archit. Lett., 2015

AYUSH: Extending Lifetime of SRAM-NVM Way-Based Hybrid Caches Using Wear-Leveling.
Proceedings of the 23rd IEEE International Symposium on Modeling, 2015

DESTINY: a tool for modeling emerging 3D NVM and eDRAM caches.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
MASTER: A Multicore Cache Energy-Saving Technique Using Dynamic Cache Reconfiguration.
IEEE Trans. Very Large Scale Integr. Syst., 2014

A survey of architectural techniques for improving cache power efficiency.
Sustain. Comput. Informatics Syst., 2014

Encache: a Dynamic Profiling-Based Reconfiguration Technique for Improving Cache Energy Efficiency.
J. Circuits Syst. Comput., 2014

A Survey of Techniques for Managing and Leveraging Caches in GPUs.
J. Circuits Syst. Comput., 2014

A study of successive over-relaxation method parallelisation over modern HPC languages.
Int. J. High Perform. Comput. Netw., 2014

A survey of techniques for improving energy efficiency in embedded computing systems.
Int. J. Comput. Aided Eng. Technol., 2014

A Survey of Methods for Analyzing and Improving GPU Energy Efficiency.
ACM Comput. Surv., 2014

Power Management Techniques for Data Centers: A Survey.
CoRR, 2014

A Study of Successive Over-relaxation Method Parallelization Over Modern HPC Languages.
CoRR, 2014

Quantitatively Modeling Application Resilience with the Data Vulnerability Factor.
Proceedings of the International Conference for High Performance Computing, 2014

EqualChance: Addressing Intra-set Write Variation to Increase Lifetime of Non-volatile Caches.
Proceedings of the 2nd Workshop on Interactions of NVM/Flash with Operating Systems and Workloads, 2014

LastingNVCache: A Technique for Improving the Lifetime of Non-volatile Caches.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Improving energy efficiency of embedded DRAM caches for high-end computing systems.
Proceedings of the 23rd International Symposium on High-Performance Parallel and Distributed Computing, 2014

WriteSmoothing: improving lifetime of non-volatile caches using intra-set wear-leveling.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

2013
BioinQA: metadata-based multi-document QA system for addressing the issues in biomedical domain.
Int. J. Data Min. Model. Manag., 2013

A Technique for Efficiently Managing SRAM-NVM Hybrid Cache.
CoRR, 2013

Using Cache-coloring to Mitigate Inter-set Write Variation in Non-volatile Caches.
CoRR, 2013

Dynamic cache reconfiguration based techniques for improving cache energy efficiency.
CoRR, 2013

A Cache Reconfiguration Approach for Saving Leakage and Refresh Energy in Embedded DRAM Caches.
CoRR, 2013

A Cache-Coloring Based Technique for Saving Leakage Energy In Multitasking Systems.
CoRR, 2013

Energy Saving Techniques for Phase Change Memory (PCM).
CoRR, 2013

CASHIER: A Cache Energy Saving Technique for QoS Systems.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

FlexiWay: A cache energy saving technique using fine-grained cache reconfiguration.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

2012
A survey of architectural techniques for DRAM power management.
Int. J. High Perform. Syst. Archit., 2012

Palette: A Cache Leakage Energy Saving Technique for Green Computing.
Proceedings of the Transition of HPC Towards Exascale Computing, 2012

2011
Versatile question answering systems: seeing in synthesis.
Int. J. Intell. Inf. Database Syst., 2011


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