Naveen Akesh

According to our database1, Naveen Akesh authored at least 2 papers between 2015 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2016
A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory.
IEEE J. Solid State Circuits, 2016

2015
A configurable TCAM/BCAM/SRAM using 28nm push-rule 6T bit cell.
Proceedings of the Symposium on VLSI Circuits, 2015


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