Dennis Sylvester
Orcid: 0000-0003-2598-0458Affiliations:
- University of Michigan, Ann Arbor, USA
According to our database1,
Dennis Sylvester
authored at least 492 papers
between 1998 and 2024.
Collaborative distances:
Collaborative distances:
Awards
IEEE Fellow
IEEE Fellow 2011, "For contributions to energy-efficient integrated circuits".
Timeline
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Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
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on orcid.org
On csauthors.net:
Bibliography
2024
A Sub-mm<sup>3</sup> Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry.
IEEE J. Solid State Circuits, April, 2024
A 1.5-μW Fully-Integrated Keyword Spotting SoC in 28-nm CMOS With Skip-RNN and Fast-Settling Analog Frontend for Adaptive Frame Skipping.
IEEE J. Solid State Circuits, January, 2024
2023
A High-Voltage Generator and Multiplexer for Electrostatic Actuation in Programmable Matter.
IEEE J. Solid State Circuits, 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
A $1.5\mu\mathrm{W}$ End-to-End Keyword Spotting SoC with Content-Adaptive Frame Sub-Sampling and Fast-Settling Analog Frontend.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
An 8.09TOPS/W Neural Engine Leveraging Bit-Sparsified Sign-Magnitude Multiplications and Dual Adder Trees.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
TaskFusion: An Efficient Transfer Learning Architecture with Dual Delta Sparsity for Multi-Task Natural Language Processing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
A 4.6nW Subthreshold Voltage Reference with 400× Current Variation Reduction and 64-Step 0.11% Output Voltage Programmability.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
SONA: An Accelerator for Transform-Domain Neural Networks with Sparse-Orthogonal Weights.
Proceedings of the 34th IEEE International Conference on Application-specific Systems, 2023
2022
A Power-Efficient Brain-Machine Interface System With a Sub-mw Feature Extraction and Decoding ASIC Demonstrated in Nonhuman Primates.
IEEE Trans. Biomed. Circuits Syst., 2022
IEEE J. Solid State Circuits, 2022
A Delta Sigma-Modulated Sample and Average Common-Mode Feedback Technique for Capacitively Coupled Amplifiers in a 192-nW Acoustic Analog Front-End.
IEEE J. Solid State Circuits, 2022
A 43 nW, 32 kHz, ±4.2 ppm Piecewise Linear Temperature-Compensated Crystal Oscillator With ΔΣ-Modulated Load Capacitance.
IEEE J. Solid State Circuits, 2022
A Light-Tolerant Wireless Neural Recording IC for Motor Prediction With Near-Infrared-Based Power and Data Telemetry.
IEEE J. Solid State Circuits, 2022
A 184nW, 121µg/√Hz Noise Floor Triaxial MEMS Accelerometer with Integrated CMOS Readout Circuit and Variation-Compensated High Voltage MEMS Biasing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 286nW, 103V High Voltage Generator and Multiplexer for Electrostatic Actuation in Programmable Matter.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Audio and Image Cross-Modal Intelligence via a 10TOPS/W 22nm SoC with Back-Propagation and Dynamic Power Gating.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 22nm 3.5TOPS/W Flexible Micro-Robotic Vision SoC with 2MB eMRAM for Fully-on-Chip Intelligence.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
A 210×340×50µm Integrated CMOS System f0r Micro-Robots with Energy Harvesting, Sensing, Processing, Communication and Actuation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
2021
IEEE J. Solid State Circuits, 2021
RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator.
IEEE J. Solid State Circuits, 2021
An Ultra-Low-Power Image Signal Processor for Hierarchical Image Recognition With Deep Neural Networks.
IEEE J. Solid State Circuits, 2021
A 192 nW 0.02 Hz High Pass Corner Acoustic Analog Front-End with Automatic Saturation Detection and Recovery.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
A 43nW 32kHz Pulsed Injection TCXO with 4.2ppm Accuracy Using ∆Σ Modulated Load Capacitance.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
Design Techniques of Integrated Power Management Circuits for Low Power Edge Devices.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
A 28-nm Compute SRAM With Bit-Serial Logic/Arithmetic Operations for Programmable In-Memory Vector Computing.
IEEE J. Solid State Circuits, 2020
A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation.
IEEE J. Solid State Circuits, 2020
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the Edge.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation.
Proceedings of the VLSI-SoC: Design Trends, 2020
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020
26.9 A 0.19×0.17mm<sup>2</sup> Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data Telemetry.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
3.3 A 0.51nW 32kHz Crystal Oscillator Achieving 2ppb Allan Deviation Floor Using High-Energy-to-Noise-Ratio Pulse Injection.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
AµProcessor Layer for mm-Scale Die-Stacked Sensing Platforms Featuring Ultra-Low Power Sleep Mode at 125°C.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020
2019
An Area-Efficient 128-Channel Spike Sorting Processor for Real-Time Neural Recording With 0.175µW/Channel in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Microelectron. J., 2019
IEEE Micro, 2019
An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Sense-and-Set Rectifier.
IEEE J. Solid State Circuits, 2019
An Acoustic Signal Processing Chip With 142-nW Voice Activity Detection Using Mixer-Based Sequential Frequency Scanning and Neural Network Classification.
IEEE J. Solid State Circuits, 2019
A 1920 $\times$ 1080 25-Frames/s 2.4-TOPS/W Low-Power 6-D Vision Processor for Unified Optical Flow and Stereo Depth With Semi-Global Matching.
IEEE J. Solid State Circuits, 2019
A 42 nJ/Conversion On-Demand State-of-Charge Indicator for Miniature IoT Li-Ion Batteries.
IEEE J. Solid State Circuits, 2019
A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination.
IEEE J. Solid State Circuits, 2019
Energy-Efficient Motion-Triggered IoT CMOS Image Sensor With Capacitor Array-Assisted Charge-Injection SAR ADC.
IEEE J. Solid State Circuits, 2019
IEEE Des. Test, 2019
A Reference Oversampling Digital Phase-Locked Loop with -240 dB FOM and -80 dBc Reference Spur.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A 1.74.12 mm<sup>3</sup> Fully Integrated pH Sensor for Implantable Applications using Differential Sensing and Drift-Compensation.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019
A Compute SRAM with Bit-Serial Integer/Floating-Point Operations for Programmable In-Memory Vector Acceleration.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction Gain.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
An 879GOPS 243mW 80fps VGA Fully Visual CNN-SLAM Processor for Wide-Range Autonomous Exploration.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Energy-Efficient Low-Noise CMOS Image Sensor with Capacitor Array-Assisted Charge-Injection SAR ADC for Motion-Triggered Low-Power IoT Applications.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
A 142nW Voice and Acoustic Activity Detection Chip for mm-Scale Sensor Nodes Using Time-Interleaved Mixer-Based Frequency Scanning.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
IoT<sup>2</sup> - the Internet of Tiny Things: Realizing mm-Scale Sensors through 3D Die Stacking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
A Fixed-Point Neural Network Architecture for Speech Applications on Resource Constrained Hardware.
J. Signal Process. Syst., 2018
Recryptor: A Reconfigurable Cryptographic Cortex-M0 Processor With In-Memory and Near-Memory Computing for IoT Security.
IEEE J. Solid State Circuits, 2018
iRazor: Current-Based Error Detection and Correction Scheme for PVT Variation in 40-nm ARM Cortex-R4 Processor.
IEEE J. Solid State Circuits, 2018
A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles.
IEEE J. Solid State Circuits, 2018
Always-On 12-nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes.
IEEE J. Solid State Circuits, 2018
A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector.
IEEE J. Solid State Circuits, 2018
IEEE J. Solid State Circuits, 2018
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A 224 PW 260 PPM/°C Gate-Leakage-Based Timer for Ultra-Low Power Sensor Nodes with Second-Order Temperature Dependency Cancellation.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A1920 × 1080 25FPS, 2.4TOPS/W Unified Optical Flow and Depth 6D Vision Processor for Energy-Efficient, Low Power Autonomous Navigation.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A 0.04MM<sup>3</sup>16NW Wireless and Batteryless Sensor System with Integrated Cortex-M0+ Processor and Optical Communication for Cellular Temperature Measurement.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
Session 18 overview: Adaptive circuits and digital regulators: Digital circuit techniques subcommittee.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A 2.5nJ duty-cycled bridge-to-digital converter integrated in a 13mm<sup>3</sup> pressure-sensing system.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
A 42nJ/conversion on-demand state-of-charge indicator for miniature IoT Li-ion batteries.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices.
IEEE Trans. Very Large Scale Integr. Syst., 2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
Hardware Designs for Security in Ultra-Low-Power IoT Systems: An Overview and Survey.
IEEE Micro, 2017
A 20-pW Discontinuous Switched-Capacitor Energy Harvester for Smart Sensor Applications.
IEEE J. Solid State Circuits, 2017
A Fully Integrated Counter Flow Energy Reservoir for Peak Power Delivery in Small Form-Factor Sensor Systems.
IEEE J. Solid State Circuits, 2017
Introduction to the January Special Issue on the 2016 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2017
Edge-Pursuit Comparator: An Energy-Scalable Oscillator Collapse-Based Comparator With Application in a 74.1 dB SNDR and 20 kS/s 15 b SAR ADC.
IEEE J. Solid State Circuits, 2017
A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems.
IEEE J. Solid State Circuits, 2017
IEEE J. Solid State Circuits, 2017
Commun. ACM, 2017
RF-Echo: A Non-Line-of-Sight Indoor Localization System Using a Low-Power Active RF Reflector ASIC Tag.
Proceedings of the 23rd Annual International Conference on Mobile Computing and Networking, 2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
9.2 A 0.6nJ -0.22/+0.19°C inaccuracy temperature sensor using exponential subthreshold oscillation dependence.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
8.3 A 553F<sup>2</sup> 2-transistor amplifier-based Physically Unclonable Function (PUF) with 1.67% native instability.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
22.6 A fully integrated counter-flow energy reservoir for 70%-efficient peak-power delivery in ultra-low-power systems.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
4.4 A sub-nW 80mlx-to-1.26Mlx self-referencing light-to-digital converter with AlGaAs photodiode.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
21.6 A 12nW always-on acoustic sensing and object recognition microsystem using frequency-domain feature extraction and SVM classification.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
11.2 A 1Mb embedded NOR flash memory with 39µW program power for mm-scale high-temperature sensor nodes.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A 25 Gb/s 470 μW active inductor equalizer for ground referenced signaling receivers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
Proceedings of the 2017 European Conference on Circuit Theory and Design, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Subthreshold voltage reference with nwell/psub diode leakage compensation for low-power high-temperature systems.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Ultralow Power Circuit Design for Wireless Sensor Nodes for Structural Health Monitoring.
Proc. IEEE, 2016
IEEE J. Solid State Circuits, 2016
An All-Digital Edge Racing True Random Number Generator Robust Against PVT Variations.
IEEE J. Solid State Circuits, 2016
A Constant Energy-Per-Cycle Ring Oscillator Over a Wide Frequency Range for Wireless Sensor Nodes.
IEEE J. Solid State Circuits, 2016
IEEE J. Solid State Circuits, 2016
A 28 nm Configurable Memory (TCAM/BCAM/SRAM) Using Push-Rule 6T Bit Cell Enabling Logic-in-Memory.
IEEE J. Solid State Circuits, 2016
A Resonant Current-Mode Wireless Power Receiver and Battery Charger With -32 dBm Sensitivity for Implantable Systems.
IEEE J. Solid State Circuits, 2016
A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs.
IEEE J. Solid State Circuits, 2016
A Low Ripple Switched-Capacitor Voltage Regulator Using Flying Capacitance Dithering.
IEEE J. Solid State Circuits, 2016
A Successive-Approximation Switched-Capacitor DC-DC Converter With Resolution of V<sub>IN</sub>/2<sup>N</sup> for a Wide Range of Input and Output Voltages.
IEEE J. Solid State Circuits, 2016
A 128-channel spike sorting processor featuring 0.175 µW and 0.0033 mm<sup>2</sup> per channel in 65-nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
A 66pW discontinuous switch-capacitor energy harvester for self-sustaining sensor applications.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
An oscillator collapse-based comparator with application in a 74.1dB SNDR, 20KS/s 15b SAR ADC.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
Proceedings of the IEEE Symposium on Security and Privacy, 2016
Proceedings of the 2016 IEEE International Workshop on Signal Processing Systems, 2016
Proceedings of the 2016 IEEE International Conference on RFID, 2016
8.8 iRazor: 3-transistor current-based error detection and correction in an ARM Cortex-R4 processor.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
21.4 A >78%-efficient light harvester over 100-to-100klux with reconfigurable PV-cell network and MPPT circuit.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
17.3 A reconfigurable dual-port memory with error detection and correction in 28nm FDSOI.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
12.1 A rational-conversion-ratio switched-capacitor DC-DC converter using negative-output feedback.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
8.5 A 60%-efficiency 20nW-500µW tri-output fully integrated power management unit with environmental adaptation and load-proportional biasing for IoT systems.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
21.5 A current-mode wireless power receiver with optimal resonant cycle tracking for implantable systems.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
Near-threshold computing in FinFET technologies: opportunities for improved voltage scalability.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Live demonstration: A 128-channel spike sorting processor featuring 0.175 μW and 0.0033 mm<sup>2</sup> per Channel in 65-nm CMOS.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
System-On-Mud: Ultra-Low Power Oceanic Sensing Platform Powered by Small-Scale Benthic Microbial Fuel Cells.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A Dual-Slope Capacitance-to-Digital Converter Integrated in an Implantable Pressure-Sensing System.
IEEE J. Solid State Circuits, 2015
IEEE J. Solid State Circuits, 2015
Digitally Controlled Leakage-Based Oscillator and Fast Relocking MDLL for Ultra Low Power Sensor Platform.
IEEE J. Solid State Circuits, 2015
SRAM for Error-Tolerant Applications With Dynamic Energy-Quality Management in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015
IEEE J. Solid State Circuits, 2015
it Inf. Technol., 2015
Proceedings of the Symposium on VLSI Circuits, 2015
A 10.6mm<sup>3</sup> fully-integrated, wireless sensor node with 8GHz UWB transmitter.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the Symposium on VLSI Circuits, 2015
A 120nW 8b sub-ranging SAR ADC with signal-dependent charge recycling for biomedical applications.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the Symposium on VLSI Circuits, 2015
Wide input range 1.7μW 1.2kS/s resistive sensor interface circuit with 1 cycle/sample logarithmic sub-ranging.
Proceedings of the Symposium on VLSI Circuits, 2015
A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability.
Proceedings of the Symposium on VLSI Circuits, 2015
A fully-integrated 40-phase flying-capacitance-dithered switched-capacitor voltage regulator with 6mV output ripple.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 2015 IEEE Workshop on Signal Processing Systems, 2015
Better-than-voltage scaling energy reduction in approximate SRAMs via bit dropping and bit reuse.
Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015
14.2 A physically unclonable function with BER<sup>-8</sup> for robust chip authentication using oscillator collapse in 40nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
F4: Building the Internet of Everything (IoE): Low-power techniques at the circuit and system levels.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
27.6 A 0.7pF-to-10nF fully digital capacitance-to-digital converter using iterative delay-chain discharge.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
8.4 A 0.33V/-40°C process/temperature closed-loop compensation SoC embedding all-digital clock multiplier and DC-DC converter exploiting FDSOI 28nm back-gate biasing.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
Racetrack converter: A low power and compact data converter using racetrack spintronic devices.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node.
Proceedings of the ESSCIRC Conference 2015, 2015
All-digital SoC thermal sensor using on-chip high order temperature curvature correction.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2015
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
2014
IEEE Trans. Very Large Scale Integr. Syst., 2014
IEEE J. Solid State Circuits, 2014
Razor-Lite: A Light-Weight Register for Error Detection by Observing Virtual Supply Rails.
IEEE J. Solid State Circuits, 2014
An Ultra-Low Power Fully Integrated Energy Harvester Based on Self-Oscillating Switched-Capacitor Voltage Doubler.
IEEE J. Solid State Circuits, 2014
A Fully-Integrated 71 nW CMOS Temperature Sensor for Low Power Wireless Sensor Nodes.
IEEE J. Solid State Circuits, 2014
An Energy Efficient Full-Frame Feature Extraction Accelerator With Shift-Latch FIFO in 28 nm CMOS.
IEEE J. Solid State Circuits, 2014
A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS.
IEEE J. Solid State Circuits, 2014
15.4b incremental sigma-delta capacitance-to-digital converter with zoom-in 9b asynchronous SAR.
Proceedings of the Symposium on VLSI Circuits, 2014
Proceedings of the Symposium on VLSI Circuits, 2014
A millimeter-scale wireless imaging system with continuous motion detection and energy harvesting.
Proceedings of the Symposium on VLSI Circuits, 2014
A 266nW multi-chopper amplifier with 1.38 noise efficiency factor for neural signal recording.
Proceedings of the Symposium on VLSI Circuits, 2014
16.3 A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
23.3 A 3nW fully integrated energy harvester based on self-oscillating switched-capacitor DC-DC converter.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
12.6 A 160nW 63.9fJ/conversion-step capacitance-to-digital converter for ultra-low-power wireless sensor nodes.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
13.7 A reconfigurable sense amplifier with auto-zero calibration and pre-amplification in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
13.8 A 32kb SRAM for error-free and error-tolerant applications with dynamic energy-quality management in 28nm CMOS.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
Chip-on-mud: Ultra-low power ARM-based oceanic sensing system powered by small-scale benthic microbial fuel cells.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Dual-slope capacitance to digital converter integrated in an implantable pressure sensing system.
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the ESSCIRC 2014, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
A 5.8nW, 45ppm/°C on-chip CMOS wake-up timer using a constant charge subtraction scheme.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
A 1.6nJ/bit, 19.9μA peak current fully integrated 2.5mm<sup>2</sup> inductive transceiver for volume-constrained microsystems.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
Mixed-signal stochastic computation demonstrated in an image sensor with integrated 2D edge detection and noise filtering.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
Low-Power Circuit Analysis and Design Based on Heterojunction Tunneling Transistors (HETTs).
IEEE Trans. Very Large Scale Integr. Syst., 2013
Introduction to the Special Section on Circuits and Systems for Energy-Autonomous Microsystems.
IEEE Trans. Circuits Syst. II Express Briefs, 2013
IEEE Trans. Circuits Syst. II Express Briefs, 2013
Circuits for a Cubic-Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
A Statistical Framework for Post-Fabrication Oxide Breakdown Reliability Prediction and Management.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE J. Solid State Circuits, 2013
A Modular 1 mm<sup>3</sup> Die-Stacked Sensing Platform With Low Power I<sup>2</sup>C Inter-Die Communication and Multi-Modal Energy Harvesting.
IEEE J. Solid State Circuits, 2013
A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells.
IEEE J. Solid State Circuits, 2013
Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction.
IEEE J. Solid State Circuits, 2013
Centip3De: A Cluster-Based NTC Architecture With 64 ARM Cortex-M3 Cores in 3D Stacked 130 nm CMOS.
IEEE J. Solid State Circuits, 2013
IPSJ Trans. Syst. LSI Des. Methodol., 2013
Centip3De: a many-core prototype exploring 3D integration and near-threshold computing.
Commun. ACM, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Razor-lite: A side-channel error-detection register for timing-margin recovery in 45nm SOI CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A 470mV 2.7mW feature extraction-accelerator for micro-autonomous vehicle navigation in 28nm CMOS.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A 0.45V 423nW 3.2MHz multiplying DLL with leakage-based oscillator for ultra-low-power sensor platforms.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A fully integrated successive-approximation switched-capacitor DC-DC converter with 31mV output voltage resolution.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
A fully integrated switched-capacitor based PMU with adaptive energy harvesting technique for ultra-low power sensing applications.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
Proceedings of the 20th IEEE International Conference on Electronics, 2013
Proceedings of the IEEE International Conference on Acoustics, 2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
Pulse amplification based dynamic synchronizers with metastability measurement using capacitance de-rating.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
IEEE Trans. Very Large Scale Integr. Syst., 2012
Sleep Mode Analysis and Optimization With Minimal-Sized Power Gating Switch for Ultra-Low ${V}_{\rm dd}$ Operation.
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
A Portable 2-Transistor Picowatt Temperature-Compensated Voltage Reference Operating at 0.5 V.
IEEE J. Solid State Circuits, 2012
IEEE J. Solid State Circuits, 2012
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the Symposium on VLSI Circuits, 2012
A 1.6-mm<sup>2</sup> 38-mW 1.5-Gb/s LDPC decoder enabled by refresh-free embedded DRAM.
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the Symposium on VLSI Circuits, 2012
Proceedings of the 2012 IEEE Radio and Wireless Symposium, 2012
A 5.58nW 32.768kHz DLL-assisted XO for real-time clocks in wireless sensing applications.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
A modular 1mm<sup>3</sup> die-stacked sensing platform with optical communication and multi-modal energy harvesting.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Bubble Razor: An architecture-independent approach to timing-error detection and correction.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
An adaptive write word-line pulse width and voltage modulation architecture for bit-interleaved 8T SRAMs.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012
Proceedings of the 11th International Conference on Information Processing in Sensor Networks (co-located with CPS Week 2012), 2012
Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs.
Proceedings of the IEEE International Conference on IC Design & Technology, 2012
Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012
SLC: Split-control Level Converter for dense and stable wide-range voltage conversion.
Proceedings of the 38th European Solid-State Circuit conference, 2012
High radix self-arbitrating switch fabric with multiple arbitration schemes and quality of service.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
Reconfigurable sleep transistor for GIDL reduction in ultra-low standby power systems.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
Design-patterning co-optimization of SRAM robustness for double patterning lithography.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the Conference Record of the Forty Sixth Asilomar Conference on Signals, 2012
XPoint cache: scaling existing bus-based coherence protocols for 2D and 3D many-core systems.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
Process Variation and Temperature-Aware Full Chip Oxide Breakdown Reliability Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
IEEE J. Solid State Circuits, 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 660pW multi-stage temperature-compensated timer for ultra-low-power wireless sensor node synchronization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiers.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011
Variation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMs.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
Proceedings of the IEEE International Conference on Acoustics, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design.
Proceedings of the 48th Design Automation Conference, 2011
2010
Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk Noise.
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits.
Proc. IEEE, 2010
IEEE J. Solid State Circuits, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
High-bandwidth and low-energy on-chip signaling with adaptive pre-emphasis in 90nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
Simultaneous extraction of effective gate length and low-field mobility in non-uniform devices.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010
Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Active learning framework for post-silicon variation extraction and test cost reduction.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilization.
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Ultra-low power circuit techniques for a new class of sub-mm<sup>3</sup> sensor nodes.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Analyzing the impact of Double Patterning Lithography on SRAM variability in 45nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Simple and Accurate Models for Capacitance Considering Floating Metal Fill Insertion.
IEEE Trans. Very Large Scale Integr. Syst., 2009
Circuit optimization techniques to mitigate the effects of soft errors in combinational logic.
ACM Trans. Design Autom. Electr. Syst., 2009
Alignment-Independent Chip-to-Chip Communication for Sensor Applications Using Passive Capacitive Signaling.
IEEE J. Solid State Circuits, 2009
IEEE J. Solid State Circuits, 2009
Proceedings of the Embedded Computer Systems: Architectures, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Proceedings of the 27th International Conference on Computer Design, 2009
Post-fabrication measurement-driven oxide breakdown reliability prediction and management.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependence.
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
Near-field communication using phase-locking and pulse signaling for millimeter-scale systems.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
IEEE J. Solid State Circuits, 2008
IEEE J. Solid State Circuits, 2008
Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008
Compact In-Situ Sensors for Monitoring Negative-Bias-Temperature-Instability Effect and Oxide Degradation.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device Failures.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 2008 International Symposium on Physical Design, 2008
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Optimal technology selection for minimizing energy and variability in low voltage applications.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
A robust alternate repeater technique for high performance busses in the multi-core era.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the ESSCIRC 2008, 2008
Proceedings of the 45th Design Automation Conference, 2008
Proceedings of the 45th Design Automation Conference, 2008
Proceedings of the 45th Design Automation Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent Variation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proc. IEEE, 2007
Proceedings of the International Symposium on System-on-Chip, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Proceedings of the 16th International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Des. Test Comput., 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 7th International Symposium on Quality of Electronic Design (ISQED 2006), 2006
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
A new technique for jointly optimizing gate sizing and supply voltage in ultra-low energy circuits.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
A dual-V<sub>DD</sub> boosted pulsed bus technique for low power and low leakage operation.
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Soft error reduction in combinational logic using gate resizing and flipflop selection.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
A new statistical max operation for propagating skewness in statistical timing analysis.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
An efficient static algorithm for computing the soft error rates of combinational circuits.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Series on Integrated Circuits and Systems, Springer, ISBN: 978-0-387-26528-5, 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
Design and analysis of spatial encoding circuits for peak power reduction in on-chip buses.
IEEE Trans. Very Large Scale Integr. Syst., 2005
IEEE Trans. Very Large Scale Integr. Syst., 2005
Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design.
IEEE Trans. Very Large Scale Integr. Syst., 2005
Static leakage reduction through simultaneous V<sub>t</sub>/T<sub>ox</sub> and state assignment.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Des. Test Comput., 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Adaptive MTCMOS for dynamic leakage and frequency control using variable footer strength.
Proceedings of the Proceedings 2005 IEEE International SOC Conference, 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk Minimization.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005
Proceedings of the 2005 International Symposium on Physical Design, 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Parametric yield maximization using gate sizing based on efficient statistical power and delay gradient computation.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
Proceedings of the 2005 Design, 2005
Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage.
Proceedings of the 2005 Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance.
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Runtime leakage minimization through probability-aware dual-Vt or dual-tox assignment.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004
Proceedings of the Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), 2004
Proceedings of the 2004 International Symposium on Physical Design, 2004
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Spatial encoding circuit techniques for peak power reduction of on-chip high-performance buses.
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004
Transistor and Pin Reordering for Gate Oxide Leakage Reduction in Dual T{ox} Circuits.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
A New Threshold Voltage Assignment Scheme for Runtime Leakage Reduction in On-Chip Repeaters.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
A general framework for probabilistic low-power design space exploration considering process variation.
Proceedings of the 2004 International Conference on Computer-Aided Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Statistical optimization of leakage power considering process variations using dual-Vth and sizing.
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 41th Design Automation Conference, 2004
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
Static Leakage Reduction through Simulteneous V<sub>T</sub>T/T<sub>OX</sub> and State Assignment.
Proceedings of the Ultra Low-Power Electronics and Design, 2004
2003
Improved a priori interconnect predictions and technology extrapolation in the GTX system.
IEEE Trans. Very Large Scale Integr. Syst., 2003
Bidirectional closed-form transformation between on-chip coupling noise waveforms and interconnect delay-change curves.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003
An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Analysis and design of level-converting flip-flops for dual-V<sub>dd</sub>/V<sub>th</sub> integrated circuits.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Dynamic clamping: on-chip dynamic shielding and termination for high-speed RLC buses.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003
Simultaneous Subthreshold and Gate-Oxide Tunneling Leakage Current Analysis in Nanometer CMOS Design.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003
Statistical estimation of leakage current considering inter- and intra-die process variation.
Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Proceedings of the 40th Design Automation Conference, 2003
Analysis and minimization techniques for total leakage considering gate oxide leakage.
Proceedings of the 40th Design Automation Conference, 2003
A cost-driven lithographic correction methodology based on off-the-shelf sizing tools.
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 40th Design Automation Conference, 2003
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
2002
Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion.
IEEE Trans. Very Large Scale Integr. Syst., 2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, 2002
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002
2001
Proc. IEEE, 2001
Proc. IEEE, 2001
Accurate in situ measurement of peak noise and delay change induced by interconnect coupling.
IEEE J. Solid State Circuits, 2001
Proceedings of the 38th Design Automation Conference, 2001
2000
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000
Proceedings of the Second IEEE/ACM International Workshop on System-Level Interconnect Prediction (SLIP 2000), 2000
Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000
Proceedings of the 37th Conference on Design Automation, 2000
New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation.
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000
1999
Proceedings of the 1999 International Symposium on Physical Design, 1999
1998
Investigation of interconnect capacitance characterization using charge-based capacitance measurement (CBCM) technique and three-dimensional simulation.
IEEE J. Solid State Circuits, 1998
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998