Navneet Kumar Gautam

According to our database1, Navneet Kumar Gautam authored at least 1 paper in 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2015
A fault tolerant test hardware for L1 cache module in tile CMPs architecture.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015


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