Nermine Ali

According to our database, Nermine Ali authored at least 6 papers between 2020 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Live Demonstration: A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS.

Ivan Miro-Panades, Vincent Lorrain, Lilian Billod, Inna Kucher, Vincent Templier, Sylvain Choisnet, Nermine Ali, Baptiste Rossigneux, Olivier Bichler, Alexandre Valentian

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

A 772μJ/frame ImageNet Feature Extractor Accelerator on HD Images at 30FPS.

Ivan Miro-Panades, Vincent Lorrain, Lilian Billod, Inna Kucher, Vincent Templier, Sylvain Choisnet, Nermine Ali, Baptiste Rossigneux, Olivier Bichler, Alexandre Valentian

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2024

2022

High-level approach for the automatic generation of optimized hardware accelerators for deep neural networks. (Approche haut niveau pour la génération automatique d'accélérateurs matériels optimisés pour les réseaux de neurones profonds).

Nermine Ali

PhD thesis, 2022

Generating Efficient FPGA-based CNN Accelerators from High-Level Descriptions.

Nermine Ali, Jean-Marc Philippe, Benoît Tain, Philippe Coussy

J. Signal Process. Syst., 2022

2021

Exploration and Generation of Efficient FPGA-based Deep Neural Network Accelerators.

Nermine Ali, Jean-Marc Philippe, Benoît Tain, Philippe Coussy

Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

2020

Deep Neural Networks Characterization Framework for Efficient Implementation on Embedded Systems.

Nermine Ali, Jean-Marc Philippe, Benoît Tain, Thomas Peyret, Philippe Coussy

Proceedings of the IEEE Workshop on Signal Processing Systems, 2020