Nicolas Laflamme-Mayer

According to our database, Nicolas Laflamme-Mayer authored at least 6 papers between 2011 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A Defect-Tolerant Reusable Network of DACs for Wafer-Scale Integration.

Nicolas Laflamme-Mayer, Gilbert Kowarzyk, Yves Blaquière, Yvon Savaria, Mohamad Sawan

IEEE Trans. Very Large Scale Integr. Syst., 2019

2016

A novel high-voltage 5.5 V resilient, floating and full-scale 3.3 V pulse-triggered level-shifter.

Nicolas Laflamme-Mayer, Mathieu Renaud

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2014

A Configurable Multi-Rail Power and I/O Pad Applied to Wafer-Scale Systems.

Nicolas Laflamme-Mayer, Yves Blaquière, Yvon Savaria, Mohamad Sawan

IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2013

Configurable Input-Output Power Pad for Wafer-Scale Microelectronic Systems.

Nicolas Laflamme-Mayer, Walder Andre, Olivier Valorge, Yves Blaquière, Mohamad Sawan

IEEE Trans. Very Large Scale Integr. Syst., 2013

A configurable analog buffer dedicated to a wafer-scale prototyping platform of electronic systems.

Nicolas Laflamme-Mayer, Mohamad Sawan, Yves Blaquière

Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2011

A large range and fine tuning configurable Bandgap reference dedicated to wafer-scale systems.

Nicolas Laflamme-Mayer, Yves Blaquière, Mohamad Sawan

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011