Nikhil Saxena

Orcid: 0000-0002-6240-4719

According to our database1, Nikhil Saxena authored at least 7 papers between 2011 and 2024.

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Bibliography

2024
Enhancing Output Corruption Through GSHE Switch Based Logic Encryption.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Hybrid Shielding: Amplifying the Power of Camouflaging and Logic Encryption.
IEEE Access, 2023

2022
ISPLock: A Hybrid Internal State Locking Method Using Polymorphic Gates.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

2021
SRTLock: A Sensitivity Resilient Two-Tier Logic Encryption Scheme.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021

2016
Virtual 3-D Walkthrough for Intelligent Emergency Response.
Proceedings of International Conference on Computer Vision and Image Processing, 2016

2014
Design of an Amplifier through Second Generation Current Conveyor.
CoRR, 2014

2011
A hierarchical architecture for detecting selfish behaviour in community wireless mesh networks.
Comput. Commun., 2011


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