Nikos Konofaos

Orcid: 0000-0003-2949-1184

Affiliations:
  • Aristotle University of Thessaloniki, Greece


According to our database1, Nikos Konofaos authored at least 25 papers between 2004 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
Simultaneous accessing of multiple SRAM subregions forming configurable and automatically generated memory fields.
Int. J. Circuit Theory Appl., 2021

A Model for Encoding Multiple Logical Qubit States into the Energy Eigenstates of a Transmon System.
Proceedings of the PCI 2021: 25th Pan-Hellenic Conference on Informatics, Volos, Greece, November 26, 2021

2019
A Quantum Cellular Automata Type Architecture with Quantum Teleportation for Quantum Computing.
Entropy, 2019

2018
High-performance and energy-efficient 64-bit incrementer/decrementer using Multiple-Output Monotonic CMOS.
Integr., 2018

Improving the Sequence Alignment Method by Quantum Multi-Pattern Recognition.
Proceedings of the 10th Hellenic Conference on Artificial Intelligence, 2018

2017
Design of Low-Power High-Performance 2-4 and 4-16 Mixed-Logic Line Decoders.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

Multi field SRAM access via intra-encoders and crossbar addressing scheme.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

Quantum noise simulation: A software module for QuCirDET.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

PSK OFDM optical wireless communication systems with receiver's diversity over gamma-gamma turbulence channels and spatial jitter.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

High-Performance and Energy-Efficient 256-Bit CMOS Priority Encoder.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Quantum Pattern Recognition for Local Sequence Alignment.
Proceedings of the 2017 IEEE Globecom Workshops, Singapore, December 4-8, 2017, 2017

2016
A Quantum Cellular Automata architecture with nearest neighbor interactions using one quantum gate type.
CoRR, 2016

2014
On the Use of FDTD and Ray-Tracing Schemes in the Nanonetwork Environment.
IEEE Commun. Lett., 2014

2010
A four base computational method for the implementation of a quantum computer using silicon devices: Circuit and simulation.
Math. Comput. Model., 2010

Low Power Single Electron Or/Nor Gate Operating at 10GHz.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009
Developing quantum nanocomputing for pervasive health environments.
Proceedings of the 2nd International Conference on Pervasive Technologies Related to Assistive Environments, 2009

Design, Simulation and Performance Evaluation of a NAND Based Single-electron 2-4 Decoder.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Design, simulation and performance evaluation of a single-electron 2-4 decoder.
Microelectron. J., 2008

Design and Simulation of NAND Gates Made of Single Electron Devices.
Proceedings of the Panhellenic Conference on Informatics, 2008

2007
A wireless infrared sensor network for the estimation of the position and orientation of a moving target.
Proceedings of the 3rd International Conference on Mobile Multimedia Communications, 2007

Utilising noise effects on infrared pattern reception for position estimation on a grid plane.
Proceedings of 12th IEEE International Conference on Emerging Technologies and Factory Automation, 2007

2006
Position Estimation on a Grid, Based on Infrared Pattern Reception Features.
Proceedings of the Ubiquitous Computing, 2006

2005
A Quantum Computer Architecture Based on Semiconductor Recombination Statistics.
Proceedings of the Advances in Informatics, 2005

2004
Electrical characterisation of SiON/n-Si structures for MOS VLSI electronics.
Microelectron. J., 2004

New Challenges Emerging on the Design of VLSI Circuits Made of MOSFETs Using New Gate Dielectric Materials.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004


  Loading...