Theodoros Simopoulos

Orcid: 0000-0002-2219-426X

Affiliations:
  • University of Patras, Greece


According to our database1, Theodoros Simopoulos authored at least 6 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2021
Simultaneous accessing of multiple SRAM subregions forming configurable and automatically generated memory fields.
Int. J. Circuit Theory Appl., 2021

2020
Application for automatic placement of hardware modules in layout form.
Proceedings of the 32nd International Conference on Microelectronics, 2020

2019
Implementation Guidelines of WDSRAM and Comparison with Typical SRAM Using Nanoscale Hierarchical Implementation Model.
J. Circuits Syst. Comput., 2019

2018
A 1Kx32 bit WDSRAM page with rapid write access.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

2017
Multi field SRAM access via intra-encoders and crossbar addressing scheme.
Proceedings of the 6th International Conference on Modern Circuits and Systems Technologies, 2017

2014
Implementation of a Low Leakage Standard Cell Library based on materials from UMC 65nm technology.
Proceedings of the 18th Panhellenic Conference on Informatics, 2014


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