According to our database1, Omar Abdelfattah authored at least 10 papers between 2010 and 2016.
Legend:Book In proceedings Article PhD thesis Other
A Top-Down Design Methodology Encompassing Components Variations Due to Wide-Range Operation in Frequency Synthesizer PLLs.
IEEE Trans. Very Large Scale Integr. Syst., 2016
An Ultra-Low-Voltage CMOS Process-Insensitive Self-Biased OTA With Rail-to-Rail Input Range.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
A 0.55-V 1-GHz frequency synthesizer PLL for ultra-low-voltage ultra-low-power applications.
Proceedings of the IEEE 6th Latin American Symposium on Circuits & Systems, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Optimization of LC-VCO tuning range under different inductor/varactor losses limitations.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014
Analytical comparison between passive loop filter topologies for frequency synthesizer PLLs.
Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology.
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
Proceedings of the 17th IEEE International Conference on Electronics, 2010