Ons Mbarek
According to our database1,
Ons Mbarek
authored at least 8 papers
between 2009 and 2013.
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Bibliography
2013
An electronic system level modeling approach for the design and verification of low-power systems-on chip. (Une approche de modélisation au niveau système pour la conception et la vérification de systèmes sur puce à faible consommation).
PhD thesis, 2013
Power domain management interface: flexible protocol interface for transaction-level power domain management.
IET Comput. Digit. Tech., 2013
Power-Aware Wrappers for Transaction-Level Virtual Prototypes: A Black Box Based Approach.
Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013
2012
Using unified power format standard concepts for power-aware design and verification of systems-onchip at transaction level.
IET Circuits Devices Syst., 2012
Using model driven engineering to reliably accelerate early Low Power Intent Exploration for a system-on-chip design.
Proceedings of the ACM Symposium on Applied Computing, 2012
Black-box and white-box early power intent simulation and verification: Two novel approaches.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
2011
A Methodology for Power-Aware Transaction-Level Models of Systems-on-Chip Using UPF Standard Concepts.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011
2009
Assertive Dynamic Power Management (AsDPM) Strategy for Globally Scheduled RT Multiprocessor Systems.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2009