Pamela S. Gillis

According to our database, Pamela S. Gillis authored at least 6 papers between 1989 and 2004.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2004

Low Overhead Delay Testing of ASICS.

Pamela S. Gillis, Francis Woytowich, Andrew Ferko, Kevin McCauley

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

1998

Delay test of chip I/Os using LSSD boundary scan.

Pamela S. Gillis, Francis Woytowich, Kevin McCauley, Ulrich Baur

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1996

Test methodologies and design automation for IBM ASICs.

Pamela S. Gillis, Tom S. Guzowski, Brion L. Keller, Randal H. Kerr

IBM J. Res. Dev., 1996

1991

A comprehensive CAD system for high-performance 300 K-circuit ASIC logic chips.

Jeannie H. Panner, Richard P. Abato, Robert W. Bassett, Keith M. Carrig, Pamela S. Gillis, David J. Hathaway, Terrence W. Sehr

IEEE J. Solid State Circuits, March, 1991

High-Density CMOS Multichip-Module Testing and Diagnosis.

Robert W. Bassett, Pamela S. Gillis, John J. Shushereba

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1989

Low Cost Testing of High Density Logic Components.

Robert W. Bassett, Barry J. Butkus, Stephen L. Dingle, Marc R. Faucher, Pamela S. Gillis, Jeannie H. Panner, John G. Petrovick, Donald L. Wheater

Proceedings of the Proceedings International Test Conference 1989, 1989