Ulrich Baur

According to our database, Ulrich Baur authored at least 5 papers between 1997 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Feasibility Study on IO-Link Wireless Low Power.

Stefan Braun, Matthias Beyer, Ulrich Baur, Christoph Boeckenhoff, Albert Dorneich

Proceedings of the 22nd IEEE International Conference on Factory Communication Systems, 2026

1998

Delay test of chip I/Os using LSSD boundary scan.

Pamela S. Gillis, Francis Woytowich, Kevin McCauley, Ulrich Baur

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset.

Jürgen Koehl, Ulrich Baur, Thomas Ludwig, Bernhard Kick, Thomas Pflueger

Proceedings of the 1998 Design, 1998

1997

Standard-cell-based design methodology for high-performance support chips.

Bernhard Kick, Ulrich Baur, Jürgen Koehl, Thomas Ludwig, Thomas Pflueger

IBM J. Res. Dev., 1997

Testing the Enterprise IBM System/390^TM Multi Processor.

Otto A. Torreiter, Ulrich Baur, Georg Goecke, Kevin Melocco

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997