Panu Hämäläinen

According to our database1, Panu Hämäläinen authored at least 16 papers between 2000 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2007
Compact modular exponentiation accelerator for modern FPGA devices.
Comput. Electr. Eng., 2007

Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks.
Proceedings of the Embedded Computer Systems: Architectures, 2007

Compact hardware design of Whirlpool hashing core.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Design and implementation of real-time betting system with offline terminals.
Electron. Commer. Res. Appl., 2006

Security in Wireless Sensor Networks: Considerations and Experiments.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Design and Implementation of Low-Area and Low-Power AES Encryption Hardware Core.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2005
Acceleration of Modular Exponentiation on System-on-a-Programmable-Chip.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Efficient byte permutation realizations for compact AES implementations.
Proceedings of the 13th European Signal Processing Conference, 2005

Design of Transport Triggered Architecture Processors for Wireless Encryption.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004
Accelerating the secure remote password protocol using reconfigurable hardware.
Proceedings of the First Conference on Computing Frontiers, 2004

2003
Offline architecture for real-time betting.
Proceedings of the 2003 IEEE International Conference on Multimedia and Expo, 2003

2002
Performance evaluation of Secure Remote Password protocol.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Implementation of encryption algorithms on transport triggered architectures.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Configurable hardware implementation of triple-DES encryption algorithm for wireless local area network.
Proceedings of the IEEE International Conference on Acoustics, 2001

2000
PARNEU: general-purpose partial tree computer.
Microprocess. Microsystems, 2000

Hardware implementation of the improved WEP and RC4 encryption algorithms for wireless terminals.
Proceedings of the 10th European Signal Processing Conference, 2000


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