Paolo Bonzini

According to our database1, Paolo Bonzini authored at least 11 papers between 2006 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2017
Cross-ISA machine emulation for multicores.
Proceedings of the 2017 International Symposium on Code Generation and Optimization, 2017

2011
EGRA: A Coarse Grained Reconfigurable Architectural Template.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2009
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration.
Proceedings of the Design, Automation and Test in Europe, 2009

2008
Recurrence-Aware Instruction Set Selection for Extensible Embedded Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2008

Design and Architectural Exploration of Expression-Grained Reconfigurable Arrays.
Proceedings of the IEEE Symposium on Application Specific Processors, 2008

A teamwork-based approach to programming fundamentals with scheme, smalltalk & java.
Proceedings of the 30th International Conference on Software Engineering (ICSE 2008), 2008

Compiling custom instructions onto expression-grained reconfigurable architectures.
Proceedings of the 2008 International Conference on Compilers, 2008

2007
A Study of Energy Saving in Customizable Processors.
Proceedings of the Embedded Computer Systems: Architectures, 2007

Polynomial-time subgraph enumeration for automated instruction set extension.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

A Retargetable Framework for Automated Discovery of Custom Instructions.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006
Code transformation strategies for extensible embedded processors.
Proceedings of the 2006 International Conference on Compilers, 2006


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