Parth Solanki

According to our database, Parth Solanki authored at least 2 papers between 2024 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

MFIT : Multi-FIdelity Thermal Modeling for 2.5D and 3D Multi-Chiplet Architectures.

Lukas Pfromm, Alish Kanani, Harsh Sharma, Parth Solanki, Eric Tervo, Jaehyun Park, Janardhan Rao Doppa, Partha Pratim Pande, Ümit Y. Ogras

ACM Trans. Design Autom. Electr. Syst., January, 2026

2024

Thermal Modeling and Management Challenges in Heterogenous Integration: 2.5D Chiplet Platforms and Beyond.

Jaehyun Park, Alish Kanani, Lukas Pfromm, Harsh Sharma, Parth Solanki, Eric Tervo, Janardhan Rao Doppa, Partha Pratim Pande, Ümit Y. Ogras

Proceedings of the 42nd IEEE VLSI Test Symposium, 2024