Patrick J. Quinn

According to our database, Patrick J. Quinn authored at least 17 papers between 1998 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

A 0.037mm² 1GSps 12b self-calibrated 40nm CMOS DAC cell with SFDR>60dB up to 200MHz and IM3 < - 60dB up to 350MHz.

Georgi I. Radulov, Patrick J. Quinn

Proceedings of the European Conference on Circuit Theory and Design, 2020

2015

A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR >50 dB Up to 1 GHz.

Georgi I. Radulov, Patrick J. Quinn, Arthur H. M. van Roermund

IEEE Trans. Very Large Scale Integr. Syst., 2015

A 28-nm CMOS 1 V 3.5 GS/s 6-bit DAC With Signal-Independent Delta-I Noise DfT Scheme.

Georgi I. Radulov, Patrick J. Quinn, Arthur H. M. van Roermund

IEEE Trans. Very Large Scale Integr. Syst., 2015

2008

A flexible 12-bit self-calibrated quad-core current-steering DAC.

Georgi I. Radulov, Patrick J. Quinn, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007

Parallel current-steering D/A Converters for Flexibility and Smartness.

Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

A binary-to-thermometer decoder with built-in redundancy for improved DAC yield.

Georgi I. Radulov, Patrick J. Quinn, Pieter C. W. van Beek, Johannes A. Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

Smart AD and DA converters.

Arthur H. M. van Roermund, Hans Hegt, Pieter Harpe, Georgi I. Radulov, Athon Zanikopoulos, Konstantinos Doris, Patrick J. Quinn

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A start-up calibration method for generic current-steering D/A converters with optimal area solution.

Georgi I. Radulov, Patrick J. Quinn, Johannes A. Hegt, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Design and optimization of multi-bit front-end stage and scaled back-end stages of pipelined ADCs.

Patrick J. Quinn, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Accuracy limitations of pipelined ADCs.

Patrick J. Quinn, Arthur H. M. van Roermund

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

An on-chip self-calibration method for current mismatch in D/A converters.

Georgi I. Radulov, Patrick J. Quinn, Hans Hegt, Arthur H. M. van Roermund

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Producing a DVD for Use in Diabetes Education.

Patrick J. Quinn, John Lynn

Proceedings of the 7th IASTED International Conference on Computers and Advanced Technology in Education, 2004

2003

Capacitor matching insensitive algorithmic ADC requiring no calibrations.

Patrick J. Quinn, Maxim Pribytko

Integr., 2003

A CMOS single-ended OTA with high CMRR.

Maxim Pribytko, Patrick J. Quinn

Proceedings of the ESSCIRC 2003, 2003

Capacitor matching insensitive 12-bit 3.3 MS/s algorithmic ADC in 0.25 μm CMOS.

Patrick J. Quinn, Maxim Pribytko

Proceedings of the IEEE Custom Integrated Circuits Conference, 2003

2000

A 10.7-MHz CMOS SC radio IF filter using orthogonal hardware modulation.

Patrick J. Quinn, Koen van Hartingsveldt, Arthur H. M. van Roermund

IEEE J. Solid State Circuits, 2000

1998

High-accuracy charge-redistribution SC video bandpass filter in standard CMOS.

Patrick J. Quinn

IEEE J. Solid State Circuits, 1998